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WM8956CGEFL/V Datasheet(PDF) 47 Page - Wolfson Microelectronics plc |
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WM8956CGEFL/V Datasheet(HTML) 47 Page - Wolfson Microelectronics plc |
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47 / 80 page ![]() Production Data WM8956 w PD, November 2011, Rev 4.1 47 MASTER MODE DACLRC ENABLE In master mode, by default DACLRC and BCLK are disabled when the DACs are both disabled. Figure 31 Master Mode Clock Output Control COMPANDING The WM8956 supports A-law and -law companding. Companding can be enabled on the DAC audio interface by writing the appropriate value to the DACCOMP register bit. REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION R9 (09h) Audio Interface (2) 4:3 DACCOMP 00 DAC companding 00 = off 01 = reserved 10 = µ-law 11 = A-law 5 WL8 0 0 = off 1 = device operates in 8-bit mode. Table 29 Companding Control Companding involves using a piecewise linear approximation of the following equations (as set out by ITU-T G.711 standard) for data compression: -law (where =255 for the U.S. and Japan): F(x) = ln( 1 + |x|) / ln( 1 + ) -1 ≤ x ≤ 1 A-law (where A=87.6 for Europe): F(x) = A|x| / ( 1 + lnA) for x ≤ 1/A F(x) = ( 1 + lnA|x|) / (1 + lnA) for 1/A ≤ x ≤ 1 The companded data is also inverted as recommended by the G.711 standard (all 8 bits are inverted for -law, all even data bits are inverted for A-law). The data will be transmitted as the first 8 MSB’s of data. Companding converts 13 bits ( -law) or 12 bits (A-law) to 8 bits using non-linear quantization. The input data range is separated into 8 levels, allowing low amplitude signals better precision than that of high amplitude signals. This is to exploit the operation of the human auditory system, where louder sounds do not require as much resolution as quieter sounds. The companded signal is an 8-bit word containing sign (1-bit), exponent (3-bits) and mantissa (4-bits). |
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