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CY8C56LP Datasheet(PDF) 43 Page - Cypress Semiconductor

Part # CY8C56LP
Description  Programmable System-on-Chip (PSoC짰)
PDF  120 Pages
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Manufacturer  CYPRESS [Cypress Semiconductor]
Direct Link  http://www.cypress.com
Logo CYPRESS - Cypress Semiconductor

CY8C56LP Datasheet(HTML) 43 Page - Cypress Semiconductor

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PRELIMINARY
PSoC® 5LP: CY8C56LP Family
Datasheet
Document Number: 001-84935 Rev. **
Page 43 of 120
Figure 7-14. CAN Bus System Implementation
7.5.1 CAN Features
CAN2.0A/B protocol implementation - ISO 11898 compliant
Standard and extended frames with up to 8 bytes of data per
frame
Message filter capabilities
Remote Transmission Request (RTR) support
Programmable bit rate up to 1 Mbps
Listen Only mode
SW readable error counter and indicator
Sleep mode: Wake the device from sleep with activity on the
Rx pin
Supports two or three wire interface to external transceiver (Tx,
Rx, and Enable). The three-wire interface is compatible with
the Philips PHY; the PHY is not included on-chip. The three
wires can be routed to any I/O
Enhanced interrupt controller
CAN receive and transmit buffers status
CAN controller error status including BusOff
Receive path
16 receive buffers each with its own message filter
Enhanced hardware message filter implementation that
covers the ID, IDE and RTR
DeviceNet addressing support
Multiple receive buffers linkable to build a larger receive
message array
Automatic transmission request (RTR) response handler
Lost received message notification
Transmit path
Eight transmit buffers
Programmable transmit priority
Round robin
Fixed priority
Message transmissions abort capability
7.5.2 Software Tools Support
CAN Controller configuration integrated into PSoC Creator:
CAN Configuration walkthrough with bit timing analyzer
Receive filter setup
CAN Node 1
PSoC
CAN Controller
CAN Transceiver
Tx Rx
En
CAN Node 2
CAN Node n
CAN_H
CAN_L
CAN_H
CAN_L
CAN_H
CAN_L
CAN
Drivers
CAN Bus



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