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CY8C56LP Datasheet(PDF) 83 Page - Cypress Semiconductor |
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CY8C56LP Datasheet(HTML) 83 Page - Cypress Semiconductor |
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83 / 120 page  PRELIMINARY PSoC® 5LP: CY8C56LP Family Datasheet Document Number: 001-84935 Rev. ** Page 83 of 120 Figure 11-30. SAR ADC DNL vs Output Code, Bypassed Internal Reference Mode Figure 11-31. SAR ADC INL vs Output Code, Bypassed Internal Reference Mode Figure 11-32. SAR ADC IDD vs sps, VDDA = 5 V, Continuous Sample Mode, External Reference Mode DNL Differential non linearity[43] VDDA 1.71 to 5.5 V, 1 Msps, VREF 1 to 5.5 V –– +2/–1 LSB VDDA 2.0 to 3.6 V, 1 Msps, VREF 2 to VDDA No missing codes – – 1.7/–0.99 LSB VDDA 1.71 to 5.5 V, 500 ksps, VREF 1 to 5.5 V No missing codes – – +2/–0.99 LSB RIN Input resistance[43] –180 – kΩv Table 11-24. SAR ADC DC Specifications (continued) Parameter Description Conditions Min Typ Max Units Notes 43. Based on device characterization (Not production tested). |
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