CY8C56LP datasheet(96/120 Pages) CYPRESS

96 / 120 page

PRELIMINARY

PSoC® 5LP: CY8C56LP Family

Datasheet

Document Number: 001-84935 Rev. **

Page 96 of 120

Figure 11-63. Bandwidth vs. Temperature, at Different Gain

Settings, Power Mode = High

Figure 11-64. Noise vs. Frequency, Vdda = 5 V,

Power Mode = High

11.5.11 Temperature Sensor

11.5.12 LCD Direct Drive

Table 11-39. PGA AC Specifications

Parameter

Description

Conditions

Min

Typ

Max

Units

BW1

–3 dB bandwidth

Power mode = high,

gain = 1, input = 100 mV

peak-to-peak

6.7

–

MHz

SR1

Slew rate

Power mode = high,

gain = 1, 20% to 80%

3––

V/µs

Input noise density

Power mode = high,

VDDA = 5 V, at 100 kHz

–43

–

nV/sqrtHz

0.1

-40

-20

20406080

Temperature, °C

Gain = 1

Gain = 24

Gain = 48

100

1000

0.01

0.1

100

1000

Frequency, kHz

Table 11-40. Temperature Sensor Specifications

Parameter

Description

Conditions

Min

Typ

Max

Units

Temp sensor accuracy

Range: –40 °C to +85 °C

–

±5

–

°C

Table 11-41. LCD Direct Drive DC Specifications

Parameter

Description

Conditions

Min

Typ

Max

Units

ICC

LCD Block (no glass)

Device sleep mode with wakeup at

400 Hz rate to refresh LCD, bus,

clock = 3MHz, Vddio = Vdda = 3 V, 8

commons, 16 segments, 1/5 duty

cycle, 40 Hz frame rate, no glass

connected

–81

–

μA

ICC_SEG

Current per segment driver

Strong drive mode

–

260

–

µA

VBIAS

LCD bias range (VBIAS refers to the main

output voltage(V0) of LCD DAC)

VDDA ≥ 3 V and VDDA ≥ VBIAS

2–

LCD bias step size

VDDA ≥ 3 V and VDDA ≥ VBIAS

–

9.1 × VDDA

–mV

LCD capacitance per segment/

common driver

Drivers may be combined

–

500

5000

Maximum segment DC offset

Vdda

≥ 3V and Vdda ≥ Vbias

–

IOUT

Output drive current per segment driver) VDDIO = 5.5 V, strong drive mode

355

–

710

µA

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