DSPIC30F4012 datasheet(144/238 Pages) MICROCHIP

144 / 238 page

dsPIC30F4011/4012

DS70135G-page 144

The configuration guidelines give the required setup

values for the conversion speeds above 500 ksps,

since they require external VREF pins usage and there

are some differences in the configuration procedure.

Configuration details that are not critical to the

conversion speed have been omitted.

Figure 20-2 illustrates the recommended circuit for the

conversion rates above 500 ksps.

FIGURE 20-2:

A/D CONVERTER VOLTAGE REFERENCE SCHEMATIC

20.7.1

1 Msps CONFIGURATION

GUIDELINE

The configuration for 1 Msps operation is dependent on

whether a single input pin is to be sampled or whether

multiple pins are to be sampled.

20.7.1.1

Single Analog Input

For conversions at 1 Msps for a single analog input, at

least two sample and hold channels must be enabled.

The analog input multiplexer must be configured so

that the same input pin is connected to both sample

and hold channels. The A/D converts the value held on

one S&H channel while the second S&H channel

acquires a new input sample.

20.7.1.2

Multiple Analog Inputs

The ADC can also be used to sample multiple analog

inputs using multiple sample and hold channels. In this

case, the total 1 Msps conversion rate is divided among

the different input signals. For example, four inputs can

be sampled at a rate of 250 ksps for each signal, or two

inputs could be sampled at a rate of 500 ksps for each

signal. Sequential sampling must be used in this

configuration to allow adequate sampling time on each

input.

VDD

VSS

VDD

VSS

dsPIC30F4011

0.01

μF

0.1

μF

0.1

μF

0.01

μF

VDD

μF

0.1

μF

0.01

μF

DSPIC30F4012 Datasheet(PDF) 144 Page - Microchip Technology

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