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FDC37C78-HT Datasheet(PDF) 78 Page - Microchip Technology |
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FDC37C78-HT Datasheet(HTML) 78 Page - Microchip Technology |
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78 / 82 page ![]() 78 t1 t2 t2 t4 X1 nRESET FIGURE 6 - CLOCK TIMING min t1 43.33 Description max Units Clock CycleTime for 24MHZ Clock High Time/Low Time for 14.318MHZ Clock Rise Time/Fall Time (not shown) nRESET Low Time t2 Name 14 5 1.5 t6 NOTE 1: The nRESET low time is dependent upon the processor clock. The nRESET must be active for a minimum of 24 x16MHz clock cycles. typ ns ns ns us 40 |
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