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FDG326P Datasheet(PDF) 5 Page - Texas Instruments

Part # FDG326P
Description  Triple-Supply Power Management IC for Powering FPGAs and DSPs
PDF  29 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

FDG326P Datasheet(HTML) 5 Page - Texas Instruments

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TPS75003-EP
www.ti.com
SGLS311A
– DECEMBER 2006 – REVISED MARCH 2011
ELECTRICAL CHARACTERISTICS (continued)
VEN1 = VIN1, VEN2 = VIN2, VEN3 = VIN3, VIN1 = VIN2 = 2.2 V, VIN3 = 3 V, VOUT3 = 2.5V, COUT1 = COUT2 = 47 μF, COUT3 = 2.2 μF,
TA = -55°C to 125°C, unless otherwise noted. Typical values are at TA = 25°C.
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNIT
LDO
VOUT3
Output voltage range (4)
1
6.5 - VDO
V
VFB3
Feedback pin voltage
0.507
V
2.95 V
≤ VIN3 ≤ 6.5 V
Feedback pin voltage accuracy(5)
±4%
1 mA
≤ IOUT3 ≤ 300 mA
ΔVOUT%/ΔVIN
Line regulation(5)
VOUT3 + 0.5V ≤ VIN3 ≤ 6.5 V
0.075
% / V
ΔVOUT%/ΔIOUT
Load regulation
10 mA
≤ IOUT3 ≤ 300 mA
0.01
% / mA
Dropout voltage
VDO
IOUT3 = 300 mA
250
350
mV
(VIN = VOUT(NOM) - 0.1)
(6)
ICL3
Current limit
VOUT = 0.9 x VOUT(NOM)
375
600
1000
mA
IFB3
Current into FB3 pin
0.03
0.1
μA
BW = 100 Hz - 100 kHz,
Vn
Output noise
400
μVRMS
IOUT3 = 300 mA
Shutdown, temperature increasing
175
Thermal shutdown temperature for
tSD
°C
LDO
Reset, temperature decreasing
160
Undervoltage lockout threshold
VIN rising
1.8
V
UVLO
Undervoltage lockout hysteresis
VIN falling
100
mV
(4)
Maximum VOUT is dependent on external components and will be less than VIN. Parameter is not production tested.
(5)
To be in regulation, minimum VIN1 (or VIN2) must be greater than VOUT1,NOM (or VOUT2,NOM) by an amount determined by external
components. Minimum VIN3 = VOUT3 + VDO or 2.2 V, whichever is greater.
(6)
VDO does not apply when VOUT + VDO < 2.2 V.
Copyright
© 2006–2011, Texas Instruments Incorporated
5
Product Folder Link(s): TPS75003-EP



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