| Electronic Components Datasheet Search |
|
FDG326P Datasheet(PDF) 16 Page - Texas Instruments |
|
|
|||||||||||||||||||||||||||||
FDG326P Datasheet(HTML) 16 Page - Texas Instruments |
|
16 / 29 page ![]() ( ) (OFF,min) OUT SCHO TTKY L O UT IN OUT DS(on) L OUT ON t V + V + R I V V IOUT r R I t ,MIN ´ ´ - - ´ - ´ ³ ( ) IN OUT OUT DS(on) L OUT ON MIN V V I r R I t ,MIN L = I - - ´ - ´ ´ D ( ) O UT S CHOTTKY L OUT OFF MIN V + V + R I t ,MIN L = I ´ ´ D OUT PMOS(RMS) OUT OUT IN V I I D = I V » ( ) [ ] ( ) ( ) 2 (cond) OUT DS(on) J OUT DS(on) P = I r 1 + TC T 25 C I D r ´ ´ ´ - ° » ´ D TPS75003-EP SGLS311A – DECEMBER 2006 – REVISED MARCH 2011 www.ti.com Inductor Value Selection (Buck Controllers) The inductor is chosen based on inductance value and maximum current rating. Larger inductors reduce current ripple (and therefore, output voltage ripple) but are physically larger and more expensive. Inductors with lower DC resistance typically improve efficiency, but also have higher cost and larger physical size. The buck converters work well with inductor values between 4.7 μH and 47 μH in most applications. When selecting an inductor, the current rating should exceed the current limit set by RIS or RDS,ON (see Current Limit section). To determine the minimum inductor size, first determine if the device will operate in minimum on-time or minimum off-time mode. The device will operate in minimum on-time mode if Equation 5 is satisfied. (5) where RL = the inductor's DC resistance. Minimum inductor size needed when operating in minimum on-time mode is given by Equation 6. (6) Minimum inductor size needed when operating in minimum off-time mode is given by Equation 7. (7) External PMOS Transistor Selection (Buck Controllers) The external PMOS transistor is selected based on threshold voltage (VT), on-resistance (RDS,ON), gate capacitance (CG) and voltage rating. The PMOS VT magnitude must be much lower than the lowest voltage at IN1 or IN2 that will be used. A VT magnitude that is 0.5 V less than the lowest input voltage is normally sufficient. The PMOS gate will see voltages from 0 V to the maximum input voltage, so gate-to-source breakdown should be a few volts higher than the maximum input supply. The drain-to-source of the device will also see this full voltage swing, and should therefore be a few volts higher than the maximum input supply. The RMS current in the PMOS can be estimated by using Equation 8. (8) The power dissipated in the PMOS is comprised of both conduction and switching losses. Switching losses are typically insignificant. The conduction losses are a function of the RMS current and the RDS,ON of the PMOS, and are calculated by Equation 9. (9) 16 Copyright © 2006–2011, Texas Instruments Incorporated Product Folder Link(s): TPS75003-EP |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |