DSPIC33FJ06GS201TESLASHMM datasheet(34/346 Pages) MICROCHIP

34 / 346 page

dsPIC33FJ06GS101/X02 and dsPIC33FJ16GSX02/X04

DS70318D-page 32

Preliminary

3.4

CPU Control Registers

SR: CPU STATUS REGISTER

R-0

R/C-0

R-0

R/C-0

R -0

R/W-0

SA(1)

SB(1)

OAB

SAB(1,4)

bit 15

bit 8

R/W-0(2)

R/W-0(3)

R-0

R/W-0

IPL<2:0>(2)

bit 7

bit 0

Legend:

C = Clearable bit

R = Readable bit

U = Unimplemented bit, read as ‘0’

S = Settable bit

W = Writable bit

-n = Value at POR

‘1’ = Bit is set

‘0’ = Bit is cleared

x = Bit is unknown

bit 15

OA:

Accumulator A Overflow Status bit

= Accumulator A overflowed

= Accumulator A has not overflowed

bit 14

OB:

Accumulator B Overflow Status bit

= Accumulator B overflowed

= Accumulator B has not overflowed

bit 13

SA:

Accumulator A Saturation ‘Sticky’ Status bit(1)

= Accumulator A is saturated or has been saturated at some time

= Accumulator A is not saturated

bit 12

SB:

Accumulator B Saturation ‘Sticky’ Status bit(1)

= Accumulator B is saturated or has been saturated at some time

= Accumulator B is not saturated

bit 11

OAB:

OA || OB Combined Accumulator Overflow Status bit

= Accumulators A or B have overflowed

= Neither Accumulators A or B have overflowed

bit 10

SAB:

SA || SB Combined Accumulator ‘Sticky’ Status bit(1,4)

= Accumulators A or B are saturated or have been saturated at some time in the past

= Neither Accumulator A or B are saturated

bit 9

DA: DO

Loop Active bit

= DO loop in progress

= DO loop not in progress

bit 8

DC:

MCU ALU Half Carry/Borrow bit

= A carry-out from the 4th low-order bit (for byte-sized data) or 8th low-order bit (for word-sized data)

of the result occurred

= No carry-out from the 4th low-order bit (for byte-sized data) or 8th low-order bit (for word-sized

data) of the result occurred

Note 1:

This bit can be read or cleared (not set).

The IPL<2:0> bits are concatenated with the IPL<3> bit (CORCON<3>) to form the CPU Interrupt Priority

Level (IPL). The value in parentheses indicates the IPL if IPL<3> = 1. User interrupts are disabled when

IPL<3> = 1.

The IPL<2:0> Status bits are read-only when NSTDIS = 1 (INTCON1<15>).

Clearing this bit will clear SA and SB.

DSPIC33FJ06GS201TE/MM Datasheet(PDF) 34 Page - Microchip Technology

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