DSPIC33FJ06GS201TESLASHMM datasheet(93/346 Pages) MICROCHIP

93 / 346 page

Preliminary

DS70318D-page 91

dsPIC33FJ06GS101/X02 and dsPIC33FJ16GSX02/X04

FIGURE 6-2:

SYSTEM RESET TIMING

Reset

Run

Device Status

VDD

VPOR

VBOR

POR Reset

BOR Reset

SYSRST

TPWRT

TPOR

TBOR

Oscillator Clock

TOSCD

TOST

TLOCK

Time

FSCM

TFSCM

Note 1:

POR Reset:

A POR circuit holds the device in Reset when the power supply is turned on. The POR circuit is

active until VDD crosses the VPOR threshold and the delay, TPOR, has elapsed.

BOR Reset:

The on-chip voltage regulator has a BOR circuit that keeps the device in Reset until VDD crosses

the VBOR threshold and the delay, TBOR, has elapsed. The delay, TBOR, ensures the voltage regulator output

becomes stable.

PWRT Timer:

The programmable power-up timer continues to hold the processor in Reset for a specific period

of time (TPWRT) after a BOR. The delay, TPWRT, ensures that the system power supplies have stabilized at the

appropriate level for full-speed operation. After the delay, TPWRT has elapsed and the SYSRST becomes

inactive, which in turn, enables the selected oscillator to start generating clock cycles.

Oscillator Delay:

The total delay for the clock to be ready for various clock source selections is given in

Table 6-1. Refer to Section 8.0 “Oscillator Configuration” for more information.

When the oscillator clock is ready, the processor begins execution from location 0x000000. The user application

programs a GOTO instruction at the Reset address, which redirects program execution to the appropriate start-up

routine.

If the Fail-Safe Clock Monitor (FSCM) is enabled, it begins to monitor the system clock when the system clock is

ready and the delay, TFSCM, has elapsed.

DSPIC33FJ06GS201TE/MM Datasheet(PDF) 93 Page - Microchip Technology

DSPIC33FJ06GS201TE/MM Datasheet(HTML) 93 Page - Microchip Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL