DSPIC33FJ06GS201TESLASHMM datasheet(85/346 Pages) MICROCHIP

85 / 346 page

Preliminary

DS70318D-page 83

dsPIC33FJ06GS101/X02 and dsPIC33FJ16GSX02/X04

NVMCON: FLASH MEMORY CONTROL REGISTER

R/SO-0(1)

R/W-0(1)

U-0

WREN

WRERR

—

bit 15

bit 8

U-0

R/W-0(1)

U-0

R/W-0(1)

—

ERASE

—

—NVMOP<3:0>(2)

bit 7

bit 0

Legend:

SO = Settable Only bit

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

-n = Value at POR

‘1’ = Bit is set

‘0’ = Bit is cleared

x = Bit is unknown

bit 15

WR:

Write Control bit

= Initiates a Flash memory program or erase operation. The operation is self-timed and the bit is

cleared by hardware once operation is complete.

= Program or erase operation is complete and inactive

bit 14

WREN:

Write Enable bit

= Enable Flash program/erase operations

= Inhibit Flash program/erase operations

bit 13

WRERR:

Write Sequence Error Flag bit

= An improper program or erase sequence attempt or termination has occurred (bit is set

automatically on any set attempt of the WR bit)

= The program or erase operation completed normally

bit 12-7

Unimplemented:

Read as ‘0’

bit 6

ERASE:

Erase/Program Enable bit

= Perform the erase operation specified by NVMOP<3:0> on the next WR command

= Perform the program operation specified by NVMOP<3:0> on the next WR command

bit 5-4

Unimplemented:

Read as ‘0’

bit 3-0

NVMOP<3:0>:

NVM Operation Select bits(2)

If ERASE = 1:

1111

= Memory bulk erase operation

1101

= Erase general segment

0011

= No operation

0010

= Memory page erase operation

0001

= No operation

0000

= Erase a single Configuration register byte

If ERASE = 0:

1111

= No operation

1101

= No operation

0011

= Memory word program operation

0010

= No operation

0001

= Memory row program operation

0000

= Program a single Configuration register byte

Note 1:

These bits can only be Reset on POR.

All other combinations of NVMOP<3:0> are unimplemented.

DSPIC33FJ06GS201TE/MM Datasheet(PDF) 85 Page - Microchip Technology

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