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DSPIC33FJ06GS201TE/MM Datasheet(PDF) 113 Page - Microchip Technology

Part # DSPIC33FJ06GS201TE/MM
Description  High-Performance, 16-bit Digital Signal Controllers
PDF  346 Pages
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Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

DSPIC33FJ06GS201TE/MM Datasheet(HTML) 113 Page - Microchip Technology

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© 2009 Microchip Technology Inc.
Preliminary
DS70318D-page 111
dsPIC33FJ06GS101/X02 and dsPIC33FJ16GSX02/X04
REGISTER 7-12:
IEC0: INTERRUPT ENABLE CONTROL REGISTER 0
U-0
U-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
—
—
ADIE
U1TXIE
U1RXIE
SPI1IE
SPI1EIE
T3IE(1,2)
bit 15
bit 8
R/W-0
R/W-0
R/W-0
U-0
R/W-0
R/W-0
R/W-0
R/W-0
T2IE
OC2IE(1,2)
IC2IE(1,2)
—
T1IE
OC1IE
IC1IE(1)
INT0IE
bit 7
bit 0
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 15-14
Unimplemented:
Read as ‘0’
bit 13
ADIE:
ADC1 Conversion Complete Interrupt Enable bit
1
= Interrupt request enabled
0
= Interrupt request not enabled
bit 12
U1TXIE:
UART1 Transmitter Interrupt Enable bit
1
= Interrupt request enabled
0
= Interrupt request not enabled
bit 11
U1RXIE:
UART1 Receiver Interrupt Enable bit
1
= Interrupt request enabled
0
= Interrupt request not enabled
bit 10
SPI1IE:
SPI1 Event Interrupt Enable bit
1
= Interrupt request enabled
0
= Interrupt request not enabled
bit 9
SPI1EIE:
SPI1 Event Interrupt Enable bit
1
= Interrupt request enabled
0
= Interrupt request not enabled
bit 8
T3IE:
Timer3 Interrupt Enable bit(1,2)
1
= Interrupt request enabled
0
= Interrupt request not enabled
bit 7
T2IE:
Timer2 Interrupt Enable bit
1
= Interrupt request enabled
0
= Interrupt request not enabled
bit 6
OC2IE:
Output Compare Channel 2 Interrupt Enable bit(1,2)
1
= Interrupt request enabled
0
= Interrupt request not enabled
bit 5
IC2IE:
Input Capture Channel 2 Interrupt Enable bit(1,2)
1
= Interrupt request enabled
0
= Interrupt request not enabled
bit 4
Unimplemented:
Read as ‘0’
bit 3
T1IE:
Timer1 Interrupt Enable bit
1
= Interrupt request enabled
0
= Interrupt request not enabled
Note 1:
These bits are unimplemented in dsPIC33FJ06GS101/102 devices.
2:
These bits are unimplemented in dsPIC33FJ06GS202 devices.



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