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STM8S005C6T6 Datasheet(PDF) 16 Page - STMicroelectronics |
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STM8S005C6T6 Datasheet(HTML) 16 Page - STMicroelectronics |
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16 / 103 page  Timer synchronization/ chaining Ext. trigger Complem. outputs CAPCOM channels Counting mode Prescaler Counter size (bits) Timer No 0 0 Up Any power of 2 from 1 to 128 8 TIM4 Analog-to-digital converter (ADC1) 4.13 The STM8S105xx products contain a 10-bit successive approximation A/D converter (ADC1) with up to 10 multiplexed input channels and the following main features: • Input voltage range: 0 to VDDA • Conversion time: 14 clock cycles • Single and continuous and buffered continuous conversion modes • Buffer size (n x 10 bits) where n = number of input channels • Scan mode for single and continuous conversion of a sequence of channels • Analog watchdog capability with programmable upper and lower thresholds • Analog watchdog interrupt • External trigger input • Trigger from TIM1 TRGO • End of conversion (EOC) interrupt Note: Additional AIN12 analog input is not selectable in ADC scan mode or with analog watchdog. Values converted from AIN12 are stored only into the ADC_DRH/ADC_DRL registers. Communication interfaces 4.14 The following communication interfaces are implemented: • UART2: Full feature UART, synchronous mode, SPI master mode, Smartcard mode, IrDA mode, LIN2.1 master/slave capability • SPI : Full and half-duplex, 8 Mbit/s • I²C: Up to 400 Kbit/s UART2 4.14.1 Main features • One Mbit/s full duplex SCI • SPI emulation • High precision baud rate generator • Smartcard emulation • IrDA SIR encoder decoder DocID022186 Rev 3 16/103 STM8S005K6 STM8S005C6 Product overview |
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