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STM8S005C6T6 Datasheet(PDF) 17 Page - STMicroelectronics |
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STM8S005C6T6 Datasheet(HTML) 17 Page - STMicroelectronics |
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17 / 103 page ![]() • LIN master mode • LIN slave mode Asynchronous communication (UART mode) • Full duplex communication - NRZ standard format (mark/space) • Programmable transmit and receive baud rates up to 1 Mbit/s (fCPU/16) and capable of following any standard baud rate regardless of the input frequency • Separate enable bits for transmitter and receiver • Two receiver wakeup modes: - Address bit (MSB) - Idle line (interrupt) • Transmission error detection with interrupt generation • Parity control Synchronous communication • Full duplex synchronous transfers • SPI master operation • 8-bit data communication • Maximum speed: 1 Mbit/s at 16 MHz (fCPU/16) LIN master mode • Emission: Generates 13-bit synch break frame • Reception: Detects 11-bit break frame LIN slave mode • Autonomous header handling - one single interrupt per valid message header • Automatic baud rate synchronization - maximum tolerated initial clock deviation ±15 % • Synch delimiter checking • 11-bit LIN synch break detection - break detection always active • Parity check on the LIN identifier field • LIN error management • Hot plugging support SPI 4.14.2 • Maximum speed: 8 Mbit/s (fMASTER/2) both for master and slave • Full duplex synchronous transfers • Simplex synchronous transfers on two lines with a possible bidirectional data line • Master or slave operation - selectable by hardware or software • CRC calculation • 1 byte Tx and Rx buffer • Slave/master selection input pin 17/103 DocID022186 Rev 3 Product overview STM8S005K6 STM8S005C6 |
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