TMS320VC5470ZHKA datasheet(43/94 Pages) TI

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MCU Subsystem Functional Overview

December 2001 − Revised December 2002

SPRS017B

4.3.1.3

UART Clocking

The UART clock divisors must be set based on the MCU subsystem clock rate and the desired baud rate.

The UART_DIV_115K register is a prescaler which divides the MCU subsystem clock down to a rate usable

by the UART state machines. The UART_DIV_BITRATE register is the divider which provides the bit clock

to the UART from the pre-scaled clock.

UART_DIV_BITRATE = MCU clock frequency / UART_DIV_115K / desired bit rate

For autobaud function on the UART/modem, the UART_DIV_115K value must result in a 115200-Hz clock

rate:

UART_DIV_115K = MCU clock frequency / 115200 Hz.

4.3.2 MCU Serial Peripheral Interface (SPI)

The SPI is a bidirectional 3-line interface dedicated to the transfer of data to and from external devices offering

a 3-line serial interface.

The SPI interface is fully-duplexed and is configurable from 1 to 32 bits, providing three enable signals

programmable either as positive or negative edge- or level-sensitive.

This serial port is based on a looped shift-register which allows for both transmit (parallel-in, serial-out) and

receive (serial-in, parallel-out) modes. The serial port is fully controlled by the MCU memory interface (data

write, data read, and activation of serialization operations).

The serial clock period (TCLKX_SPI) is derived from the MCU subsystem clock, based on a prescale divider

(PTV):

SPI Clock Rate = MCU Clock Rate / (4 * PTV)

where PTV is 2, 4, 8, or 16.

4.3.3 MCU General-Purpose I/O

The 5470 provides 36 general-purpose I/Os (GPIOs) configurable in read or write mode by internal registers.

The GPIOs are divided into two groups, GPIO(19:0) and KBGPIO(15:0). KBGPIOs are keyboard GPIO pins,

which are implemented similarly to the GPIO(19:0) pins, although some KBGPIO pins have internal pullup

resistors. Some of the GPIO and KBGPIO pins share functionality with signals from other modules. Register

bits configure whether the pin is used for the normal GPIO or KBGPIO functionality, or for the alternate

functionality.

Each GPIO is associated with 6 configuration/status bits whose description is given in Table 4−2 and

Table 4−3.

TMS320VC5470ZHKA Datasheet(PDF) 43 Page - Texas Instruments