FG484 datasheet(91/242 Pages) MICROSEMI

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ProASIC3L Low Power Flash FPGAs

Revision 13

2-75

Table 2-111 • 1.5 V LVCMOS Low Slew – Applies to 1.2 V DC Core Voltage

Commercial-Case Conditions: TJ = 70°C, Worst-Case VCC = 1.14 V, Worst-Case VCCI = 1.4 V

Applicable to Standard Plus I/O Banks

Drive

Strength

Speed

Grade

tDOUT

tDP

tDIN

tPY

tEOUT

tZL

tZH

tLZ

tHZ

tZLS

tZHS

Units

2 mA

Std.

0.70

7.32

0.05

1.17

0.50

7.45

6.38

2.44

2.18

9.46

8.40

–1

0.60

6.22

0.04

0.99

0.43

6.34

5.43

2.08

1.86

8.05

7.14

4 mA

Std.

0.70

6.29

0.05

1.17

0.50

6.40

5.65

2.73

2.70

8.42

7.67

–1

0.60

5.35

0.04

0.99

0.43

5.45

4.81

2.33

2.29

7.16

6.52

Notes:

1. Software default selection highlighted in gray.

2. For specific junction temperature and voltage supply levels, refer to Table 2-6 on page 2-7 for derating values.

Table 2-112 • 1.5 V LVCMOS High Slew – Applies to 1.2 V DC Core Voltage

Commercial-Case Conditions: TJ = 70°C, Worst-Case VCC = 1.14 V, Worst-Case VCCI = 1.4 V

Applicable to Standard Plus I/O Banks

Drive

Strength

Speed

Grade

tDOUT

tDP

tDIN

tPY

tEOUT

tZL

tZH

tLZ

tHZ

tZLS

tZHS

Units

2 mA

Std.

0.70

2.90

0.05

1.28

0.50

2.95

2.63

2.44

2.29

4.97

4.64

–1

0.60

2.47

0.04

1.09

0.43

2.51

2.24

2.07

1.95

4.23

3.95

4 mA

Std.

0.70

2.52

0.05

1.28

0.50

2.57

2.14

2.73

2.82

4.58

4.15

–1

0.60

2.15

0.04

1.09

0.43

2.19

1.82

2.32

2.40

3.90

3.53

Notes:

1. Software default selection highlighted in gray.

2. For specific junction temperature and voltage supply levels, refer to Table 2-6 on page 2-7 for derating values.

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