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T89C51RD2-3CWC-L Datasheet(PDF) 84 Page - ATMEL Corporation |
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T89C51RD2-3CWC-L Datasheet(HTML) 84 Page - ATMEL Corporation |
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84 / 86 page ![]() Rev. F - 15 February, 2001 84 T89C51RD2 9.5.11. External Clock Drive Characteristics (XTAL1) Table 48. AC Parameters 9.5.12. External Clock Drive Waveforms 9.5.13. AC Testing Input/Output Waveforms AC inputs during testing are driven at VCC - 0.5 for a logic “1” and 0.45V for a logic “0”. Timing measurement are made at VIH min for a logic “1” and VIL max for a logic “0”. 9.5.14. Float Waveforms For timing purposes as port pin is no longer floating when a 100 mV change from load voltage occurs and begins to float when a 100 mV change from the loaded VOH/VOL level occurs. IOL/IOH ≥± 20mA. Symbol Parameter Min Max Units TCLCL Oscillator Period 25 ns TCHCX High Time 5 ns TCLCX Low Time 5 ns TCLCH Rise Time 5 ns TCHCL Fall Time 5 ns TCHCX/TCLCX Cyclic ratio in X2 mode 40 60 % VCC-0.5V 0.45V 0.7VCC 0.2VCC-0.1 TCHCL TCLCX TCLCL TCLCH TCHCX INPUT/OUTPUT 0.2 VCC + 0.9 0.2 VCC - 0.1 VCC -0.5 V 0.45 V FLOAT VOH - 0.1 V VOL + 0.1 V VLOAD VLOAD + 0.1 V VLOAD - 0.1 V |
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