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T89C51RD2-3CWC-L Datasheet(PDF) 40 Page - ATMEL Corporation |
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T89C51RD2-3CWC-L Datasheet(HTML) 40 Page - ATMEL Corporation |
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40 / 86 page ![]() 40 Rev. F - 15 February, 2001 T89C51RD2 Table 20. IPH Register IPH - Interrupt Priority High Register (B7h) Reset Value = X000 0000b Not bit addressable 7 6 5 4 3 2 1 0 - PPCH PT2H PSH PT1H PX1H PT0H PX0H Bit Number Bit Mnemonic Description 7 - Reserved The value read from this bit is indeterminate. Do not set this bit. 6 PPCH PCA interrupt priority bit high. PPCHPPC Priority Level 0 0 Lowest 01 10 1 1 Highest 5 PT2H Timer 2 overflow interrupt Priority High bit PT2HPT2 Priority Level 0 0 Lowest 01 10 1 1 Highest 4 PSH Serial port Priority High bit PSHPS Priority Level 0 0 Lowest 01 10 1 1 Highest 3 PT1H Timer 1 overflow interrupt Priority High bit PT1HPT1 Priority Level 0 0 Lowest 01 10 1 1 Highest 2 PX1H External interrupt 1 Priority High bit PX1HPX1 Priority Level 0 0 Lowest 01 10 1 1 Highest 1 PT0H Timer 0 overflow interrupt Priority High bit PT0HPT0 Priority Level 0 0 Lowest 01 10 1 1 Highest 0 PX0H External interrupt 0 Priority High bit PX0HPX0 Priority Level 0 0 Lowest 01 10 1 1 Highest |
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