CS494002 datasheet(58/100 Pages) CIRRUS

58 / 100 page

6.3.1 Host Message (HOSTMSG) Register, A[1:0] = 00b

The HOSTMSG register is a 32-bit register that is

used to read from or write to DSPC. It is read and

written in 4-byte transactions. This register passes

all the code, control and configuration data to and

from DSPC. Messages are read and written

MS_BYTE first.

MS_BYTE

This is the most significant byte (bits 31:24).

BYTE_B

This is BYTE_B (bits 23:16).

BYTE_A

This is BYTE_A (bits 15:8).

LS_BYTE

This is the least significant byte (bits 7:0).

6.3.2 Host Control (CONTROL) Register, A[1:0] = 01b

Reserved

Always write a 0.

BYTE_SEL

Always write a 11b to these bits.

HINBSY

This bit is the Host Input Ready signal. It is set when the host writes to the HOSTMSG register.

It is cleared when DSPC reads the HOSTMSG register. This bit is also pinned out on the

HINBSY pin. Read only by the host and DSPC.

HOUTRDY

This bit is set when DSPC writes data to the HOST_MSG register, and indicates that the DSP

has a pending message for the host. The HOUTRDY bit is cleared when the host reads the

HOSTMSG register. The bit is inverted and pinned out on the INTREQ pin. Read only by the

host and DSPC

6.3.3 Host Data1 Input (HOSTDATA1) Register, A[1:0] = 10b

HOSTDATA1_7–0

The host writes data to DSPC at this address. (Write only)

6.3.4 Host Data2 Input (HOSTDATA2) Register, A[1:0] = 11b

HOSTDATA2_7–0

The host writes data to DSPC at this address. (Write only)

MS_BYTE

BYTE_B

BYTE_A

76543

210

LS_BYTE

76543

210

Reserved

BYTE_SEL

HINBSY

HOUTRDY

Reserved

76543

210

HOSTDATA1_

76543

210

HOSTDATA2_

Table 8. Parallel Input/Output Registers for DSPC

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