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DS2152 Datasheet(PDF) 52 Page - Dallas Semiconductor

Part # DS2152
Description  Enhanced T1 Single-Chip Transceiver
PDF  94 Pages
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Manufacturer  DALLAS [Dallas Semiconductor]
Direct Link  https://www.maximintegrated.com/en.html
Logo DALLAS - Dallas Semiconductor

DS2152 Datasheet(HTML) 52 Page - Dallas Semiconductor

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DS2152
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RCC1/RCC2/RCC3:
RECEIVE CHANNEL CONTROL REGISTER (Address=1B to 1D Hex)
(MSB)
(LSB)
CH8
CH7
CH6
CH5
CH4
CH3
CH2
CH1
RCC1 (1B)
CH16
CH15
CH14
CH13
CH12
CH11
CH10
CH9
RCC2 (1C)
CH24
CH23
CH22
CH21
CH20
CH19
CH18
CH17
RCC3 (1D)
SYMBOL
POSITION
NAME AND DESCRIPTION
CH24
RCC3.7
Receive Channel 24 Code Insertion Control Bit
0=do not insert data from the RC24 register into the receive data
stream
1=insert data from the RC24 register into the receive data stream
CH1
RCC1.0
Receive Channel 1 Code Insertion Control Bit
0=do not insert data from the RC1 register into the receive data
stream
1=insert data from the RC1 register into the receive data stream
9.0 CLOCK BLOCKING REGISTERS
The Receive Channel Blocking Registers (RCBR1/RCBR2/RCBR3) and the Transmit Channel Blocking
Registers (TCBR1/TCBR2/TCBR3) control the RCHBLK and TCHBLK pins respectively. The
RCHBLK and TCHCLK pins are user-programmable outputs that can be forced either high or low during
individual channels. These outputs can be used to block clocks to a USART or LAPD controller in
Fractional T1 or ISDN-PRI applications. When the appropriate bits are set to a 1, the RCHBLK and
TCHCLK pins will be held high during the entire corresponding channel time. See the timing in Section
15 for an example.
RCBR1/RCBR2/RCBR3:
RECEIVE CHANNEL BLOCKING REGISTERS (Address=6C to 6E Hex)
(MSB)
(LSB)
CH8
CH7
CH6
CH5
CH4
CH3
CH2
CH1
RCBR1 (6C)
CH16
CH15
CH14
CH13
CH12
CH11
CH10
CH9
RCBR2 (6D)
CH24
CH23
CH22
CH21
CH20
CH19
CH18
CH17
RCBR3 (6E)
SYMBOL
POSITION
NAME AND DESCRIPTION
CH24
RCBR3.7
Receive Channel Blocking Registers.
0=force the RCHBLK pin to remain low during this channel
time
CH1
RCBR1.0
1=force the RCHBLK pin high during this channel time



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