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MB86604LPFV Datasheet(PDF) 27 Page - fujitsu semiconductor |
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MB86604LPFV Datasheet(HTML) 27 Page - fujitsu semiconductor |
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27 / 56 page  27 MB86604L (b) Read timing * : The position number indicates the position in the waveform. Parameter Symbol Value Unit Base signal Position* Min. Max. DACK “L” assert time DREQ “H” tRQAK A0 — ns DREQ “L” negate time DACK “L” tAKRQ B — 40 ns DREQ “H” assert time (8 bit) DACK “H” tAKRQ1 C — 50 ns DREQ “H” assert time (16 bit) DACK “H” tAKRQ2 C— 2 tCLK + 40 ns DMUDS/DMLDS “L” assert time DACK “L” tAKDS D0— ns DMR/W set up time DMUDS/DMLDS “L” tsuRW E20 — ns DMR/W hold time DMUDS/DMLDS “H” thRW F20 — ns DMUDS/DMLDS “L” level pulse width — twDSL G40 — ns DACK “H” negate time DMUDS/DMLDS “L” tDSAK1 H1 tCLK —ns DMUDS/DMLDS “H” tDSAK2 I0 — ns Data output defined time DMUDS/DMLDS “L” tvDMD J — 40 ns Data output hold time DMUDS/DMLDS “H” thDMD K10 — ns E J F K Valid data DREQ DMD15 to DMD0 UDMDP, LDMDP G H I D B A C DACK DMR/W DMUDS/DMLDS t RQAK t AKRQ t AKDS t suRW t vDMD t wDSL t hRW t hDMD t DSAK2 t DSAK1 t AKRQ1/2 |
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