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AN4475 Datasheet(PDF) 11 Page - STMicroelectronics |
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AN4475 Datasheet(HTML) 11 Page - STMicroelectronics |
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11 / 26 page ![]() Functional safety requirements for application software AN4475 12/27 DocID026216 Rev 1 requirements as described in the Preface. Each pad not dedicated to a specific function can be configured as GPIO with the exception of ADC pads, as they can only be configured as GPIs. SIU pads can be configured via the relevant pad configuration registers (PCRn). Single write digital output with read-back Implementation hint: SIU pads are used to perform a single write digital output with read- back. The read-back is done using the external configuration or the internal. SIU pads are configured as follows (see also Figure 1): • External read-back: one SIU pad is configured to allow read-back of the output write on the selected SIU pad and the loop-back is done with an external connection outside the device. Using this configuration, external pins are used. In case of External read-back, the two selected pads are not be physically adjacent; • Internal read-back(c): one SIU pad is configured to allow read-back of the output write on the selected SIU pad via an internal read path. Using this configuration, a single external pin is used. Double Write Digital Outputs Implementation hint: SIU pads are used to perform a double write digital output. SIU pads are correctly configured and the output write of the selected channels are implemented following these guidelines: • The two outputs are written with a single instruction to the appropriate register; • The output register is read-back(d). The two selected pads are not be physically adjacent to minimize CCFs. Each pad not dedicated to a specific function can be configured as GPIO with the exception of ADC pads, as they can only be configured as GPIs. SIU pads can be configured via the relevant pad configuration registers (PCRn).To write two (or more) GPIOs with a single write instruction, the Parallel GPIO Pad Data Out (PGPDOx) register can be used. User has to take care that the two selected GPIOs are controlled by the same PGPDOx register. To protect the value of the other GPIOs that belong to the same PGPDOx register, the Masked Parallel GPIO Pad Data Out (MPGPDOx) register is properly configured before writing the PGPDOx register. 2.9.4 Write PWM outputs Suggested: [covers: SW_WRT_PWM_OUTPUT] some PWM outputs are written either redundantly or with read-back. Write PWM output operation can be implemented as single write PWM output with read-back or double write PWM output. [end] Rationale: to verify that the two sets of data match. c. Internal read back does not cover package faults (e.g. wire bond). Refer to the specific reference manual to verify the availability of the internal read path. d. This is not strictly requested. The SPC563Mxx can demand to an external device to check the integrity of the PWM generation. |
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