PDP Sustain circuit

AN2503

12/30

3.1

Sustain circuit operations

Sustain circuit operations describe the way to generate a square waveform on the panel

capacitor. This section describes how to charge and discharge the panel capacitor in order

to perform the sustain phase.

3.1.1

After the reset period, we can suppose that all cells on the panel have been already

addressed during the address period. This means that the cells to be displayed have

accumulated enough wall charge to be ignited, due to cell memory effect. We can assume

also that CS1 and CS2 have already their steady state voltage value, this means they have

are turned ON and D1 is forward biased. CS1 charges and raises the voltage across the

panel capacitor Cp in a resonant way. This step is a part of the energy recovery phase since

it recovers the energy stored in the capacitor CS1 from previous sustain cycles back to the

panel.

Figure 13.

The equivalent circuit during the LC resonant period of the energy recovery circuit is:

Figure 14.

Equivalent circuit

In Figure 14, R represents the parasitic resistance including on-resistances of switches and

obtained as follows:

Equation 2

Vs

Vs

Vs

Vset

L7

T9

T10

T8

T12

T11

-Vreset

Cp

CS1

CS2

L1

D7

D8

D6

D5

T7

D1

Vs

T3

T2

T1

T4

T6

T5

D2

D4

D3

V

yx

V

s

2

------

V

ON

–

⎝⎠

⎛⎞ 1e

t

τ

---

–

ωt

cos

R

ωL

------

ωt

sin

+

⎝⎠

⎛⎞

–

=