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AN1317 Datasheet(PDF) 6 Page - STMicroelectronics |
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AN1317 Datasheet(HTML) 6 Page - STMicroelectronics |
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6 / 23 page ![]() 6/23 AN1317 - APPLICATION NOTE Figure 5: 2W typical single output not isolated power supply with Inverter topology 3. DESIGN METHODOLOGY The schematic of either fig. 1 or fig. 5 can be separated into six blocks: • The oscillator network composed by R1 and C3. • The Buck or inverter structure, which is composed by the on chip MOSFET, the inductor L1, the free wheeling diode D3 and the output filtering capacitor C5. • The VIPer20 supply circuit, composed by D2 and C2. • The front rectifier and filter. • The error amplifier compensation network composed by R2 and C4. All these functions will be detailed in the next paragraphs. 3.1 Switching Frequency And Duty Cycle Sections 1 and 2 showed that the input voltage transformation is entirely managed by the VIPer20 which controls the switching duty cycle. Whatever the topology is, the goal is to look for the widest load regulation range, trying to reach the VIPer20 minimum turn on time (TONmin = 500 ns typ.) for the lowest output load. For maximum load, although the VIPer20 is perfectly compatible from the continuous mode, it must be avoided because the power dissipation in the free wheeling diode D3 would be too high and the inductor size and price would increase. For all the above reasons, these topologies are operated at 13V OSC COMP SOURCE DRAIN VDD - + VIPer20 R2 3.9k C4 100nF R1 10k C3 10nF D1 1N4007 C1 22uF 400V L1 470uH D3 BYT01-400V C5 33uF 16V D2 BYT01-400V C2 10uF 16V AC IN AC IN -13V GND OUT |
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