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AN1317 Datasheet(PDF) 11 Page - STMicroelectronics

Part # AN1317
Description  NON ISOLATED POWER SUPPLIES IN BUCK AND INVERTER CONFIGURATION USING VIPer20 DEVICE
PDF  23 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

AN1317 Datasheet(HTML) 11 Page - STMicroelectronics

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AN1317 - APPLICATION NOTE
While the output voltage grows up, the discontinuous mode is reached and the average output current
becomes the half of the maximum peak current:
and
The average output current for
can be approximate as:
At the beginning of the start up phase, the capacitor C2 is charged at VDDon, and it can supply the VDD
pin down to VDDoff. So, tss can be expressed as:
, with
So:
Finally:
With: Vout=13V, IDD0=16mA, Ip=IDlim=0.5A min, VDDhyst=2.4V, C5=33µF, C2>7.6 µF.
3.5 Front Rectifier And Filter
As single wave rectification is chosen because it allows to have the output ground connected to one of
the mains lines, as it is required in most of the non isolated applications. As the involved power is low, the
input filtering can be achieved without huge bulk capacitor. Any usual rectification diode having a reverse
voltage of 800 V will fit the needs. On the schematic of fig. 1 and 5, we used the part number 1N4007.
The energy stored in the bulk capacitor during the conduction time of the diode must be equal to the total
power dissipated when the diode is blocked.
Referring to fig. 8 and with the efficiency of the converter
, it comes:
The designer can easily choose Vinlow according to the input voltage range and the output ripple he can
accept, knowing that a Vinlow reasonable value is 70% of Vinpeak.
t0
I
ou tavg
I
Dlim
≈
⇒
=
tt
ss
I
out avg
1
2
---I
Dl im
≈
⇒
=
0t
t
ss
≤≤
I
outa vg
3
4
---I
Dli m
≈
t
ss
I
DDo
C
2
⋅
V
DDhys t
-----------------------
=
V
DDhys t
V
DDon
V
DDof f
–
=
C
2
I
DD0
t
ss
⋅
V
DDhyst
----------------------
I
DD0
C
5
V
out
⋅
() 3
4
---
I
Dli m
⋅
()
⁄
V
DDhyst
-------------------------------------------------------
>
=
C
2
I
DD0
4C
5
V
out
⋅⋅
3I
Dlim
V
DDh yst
⋅⋅
---------------------------------------------
>
η
P
out
P
in
----------
=
1
2
---C
1 V
2
i npeak
V
2
in low
–
()
t
2
t
1
–
() P
out
1
η
---
⋅⋅
=



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