AN4504 datasheet(12/41 Pages) STMICROELECTRONICS

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Reading angular rate data

AN4504

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DocID026419 Rev 1

3.5

Understanding angular rate data

The measured angular rate data are sent to the OUT_X_H, OUT_X_L, OUT_Y_H,

OUT_Y_L, OUT_Z_H, and OUT_Z_L registers. These registers contain, respectively, the

most significant part and the least significant part of the angular rate signals acting on the X,

Y, and Z axes.

The complete angular rate data for the X (Y, Z) channel is given by the concatenation

OUT_X_H & OUT_X_L (OUT_Y_H & OUT_Y_L, OUT_Z_H & OUT_Z_L) and it is

expressed as a two’s complement number.

3.5.1

Data alignment

Angular rate data are represented as 16-bit numbers and are left-justified.

3.5.2

Big-little endian selection

The L3G4200D allows swapping the content of the lower and the upper part of the angular

rate registers (i.e. OUT_X_H with OUT_X_L) in order to be compliant with both little-endian

and big-endian data representations.

“Little Endian” means that the low-order byte of the number is stored in memory at the

lowest address, and the high-order byte at the highest address (the little end comes first).

This mode corresponds to bit BLE in CTRL_REG4 set to 0 (default configuration).

On the contrary, “Big Endian” means that the high-order byte of the number is stored in

memory at the lowest address, and the low-order byte at the highest address.

3.5.3

Example of angular rate data

Table 6 provides a few basic examples of the data that is read in the data registers when the

device is subject to a given angular rate. The values listed in the table are given under the

hypothesis of perfect device calibration (i.e. no offset, no gain error,....) and practically show

the effect of the BLE bit.

Table 6. Output data registers content vs. angular rate (FS = 250 dps)

Angular rate values

BLE = 0

BLE = 1

28h

29h

28h

29h

0 dps

00h

100 dps

A4h

2Ch

A4h

200 dps

49h

59h

49h

-100 dps

5Ch

C4h

C3h

5Ch

-200 dps

B7h

A6h

B7h

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