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AN2344 Datasheet(PDF) 8 Page - STMicroelectronics |
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AN2344 Datasheet(HTML) 8 Page - STMicroelectronics |
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8 / 27 page ![]() Testing avalanche ruggedness AN2344 8/27 The device is essentially an open circuit up to its own blocking voltage, therefore the extra voltage is limited by the BVDSS of the device under test (DUT). During the Avalanche, the current flows through the DUT, dissipating the accumulated energy that was stored in the coil during the charging operation. Table 1.: UIS circuit equations on page 8 explains several relations for the tAV, EAV, and the PAVG with several circuit configurations. A device is commonly defined rugged, or avalanche-rated, if during some stated coil and conducted current conditions, the device survives this test. In the past, circuits like the one in Figure 4. were recommended to test for this capability. The current is maintained constant for a set time, eliminating the requirement for the coil. However, the only recognized method is to use the circuit described in Figure 2. (per JEDEC standard No. 24-5, MIL-STD750D method 3040.2). A circuit commonly used to test the avalanche ruggedness of the MOSFET is shown in Figure 5. Its special feature is a power switch in series to the VDD that connects the voltage source to the circuit only during the coil charging, disconnecting it a few microseconds before the switch-off and the avalanche operation. This technique allows the user to increase the VDD beyond DUT‘s maximum rated VDS, which speeds up the charging of the coil during turn-on, and consequently decreases the turn-on state time. Also, the energy dissipated is different (see Table 1.). Figure 4. Constant current avalanche fixture Figure 5. Disconnected supply UIS fixture |
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