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HOW TO MINIMIZE THE ST7 POWER CONSUMPTION

Watchdog is inactive and the WDGHALT option bit is disabled.), a Reset or specific interrupt

must occur. Before servicing an interrupt, the CC register is pushed on the stack. The I[1:0]

bits in the CC register are set to the current software priority level of the interrupt routine and

recovered when the CC register is popped. When the Watchdog is active and the WDGHALT

option bit is enabled, a Watchdog reset is generated.

Uses:

– To place the MCU in the lowest power consumption mode without Real Time Clock.

– The CPU and Peripherals (Peripheral clocked with external clock source can still be active)

are OFF.

3.7 SUMMARY

Table 1. Summary Table

4 EXAMPLES

This section provides standard methods to achieve minimum power consumption in a partic-

ular ST7 application for following different microcontrollers, which can be used as a reference

during application development. For user reference it also provides data values measured in

lab for described applications presented as examples for different devices. CLICK on required

device to see more information on

- Appendix A: ST72F324 Standard Examples

- Appendix B: ST7FLITE0 Standard Examples

Note: The values provided in this application note are typical only, measured on a small

number of devices.

5 POWER MANAGEMENT TIPS

– If you are not using the ADC, SPI, SCI or timers in the application, switch them off.

– All the port pins should be push pull output at low level.

– All I/O ports should be connected to an external pull-up or pull-down to avoid leakage due to

floating inputs.

ST7 Modes

Oscillator/CPU/Peripheral Status

Oscillator

CPU

Peripherals

RTC

MCCSR-OIE

Bit

MCCSR-

SMS Bit

Run

On

On

On

Available

X

Reset

Slow

On

On

On

Available

X

Set

Wait

On

Off

On

Available

X

Reset

Slow-Wait

On

Off

On

Available

X

Set

Active-Halt

On

Off

Off

Available

Set

X

Halt

Off

Off

Off

Not Available

Reset

X