AN1014 datasheet(8/25 Pages) STMICROELECTRONICS

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HOW TO MINIMIZE THE ST7 POWER CONSUMPTION

6.1.2.1 Run Mode

Methodology:

A resonator oscillator is used with fosc at 4 / 8 MHz. PLL*2 is disabled (So, fosc2 is fosc/2). All

peripherals are in reset configuration except the ports. So, the SMS bit in the MCCSR is reset

to 0. The CP1 and CP0 bits in the MCCSR are also reset to 0 and hence fCPU is fosc2. All ports

are set as Push-Pull Outputs with low level.

Measurements:

Table 2. Consumption IDD (RUN Mode) at TA = + 25 °C

6.1.2.2 Slow Mode

Methodology: A resonator oscillator is used with fosc at 4 / 8 MHz. PLL*2 is disabled. So, fosc2

is fosc/2. All peripherals are in reset configuration except the ports and the SMS bit in the

MCCSR is set to 1. The CP1 and CP0 bits in the MCCSR are set to an appropriate value.

Hence fCPU is fosc /4, fosc/8, fosc/16, fosc/32. All ports are set as Push-Pull Outputs with low

level.

Measurements:

Table 3. Consumption IDD (SLOW Mode) at TA = + 25 °C

6.1.2.3 Wait Mode

Methodology: A resonator oscillator is used with fosc at 4 / 8 MHz. PLL*2 is disabled. So, fosc2

is fosc/2. All peripherals are in reset configuration except the ports. So, the SMS bit in the

MCCSR is reset to 0. The CP1 and CP0 bits in the MCCSR are also reset to 0 and hence fCPU

is fosc2. All ports are set as Push-Pull Outputs with low level.

fOSC(MHz)

fCPU(MHz)

IDD at VDD = 4.5 V

IDD at VDD = 5 V

IDD at VDD = 5.5 V

3.90 mA

4.38 mA

4.91 mA

5.88 mA

6.67 mA

7.42 mA

fOSC(MHz)

fCPU(MHz)

IDD at VDD = 4.5 V

IDD at VDD = 5 V

IDD at VDD = 5.5 V

40.125

1.33 mA

1.51 mA

1.70 mA

4 / 8

0.25

1.67 mA

1.93 mA

2.18 mA

4 / 8

0.5

2.25 mA

2.54 mA

2.88 mA

4 / 8

2.87 mA

3.25 mA

3.64 mA

3.88 mA

4.46 mA

4.95 mA

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