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HOW TO MINIMIZE THE ST7 POWER CONSUMPTION

7.1.2.5 Active-Halt Mode

Methodology: An external CLK source, up to 16MHz is used on pin CLKIN. PLL is disabled

and internal RC Oscillator is OFF. So, fOSC is CLKIN / 2. All peripherals are in reset configura-

tion except the I/O Ports. All Ports are in Push-Pull Outputs with low level. Set ATCSR- CK1

bit to 0 & CK0 & OVFIE bits to 1. MCU is woken-up by AT TIMER Overflow Interrupt. The os-

cillator is ON, so the total consumption includes the oscillator consumption also.

Measurements:

Table 16. Consumption IDD (Active-Halt Mode) at TA = + 25 °C

7.1.2.6 Halt Mode

Methodology: An external CLK source, up to 16MHz is used on pin CLKIN. PLL is disabled

and internal RC Oscillator is OFF. So, fOSC is CLKIN / 2. All peripherals are in reset configura-

tion except Ports. All Ports are in Push-Pull Outputs with low level.

Measurements:

Table 17. Consumption IDD (Halt Mode) at TA = + 25 °C

7.1.3 Conclusion

Current consumption depends on VDD. Consumption increases with the increase of VDD and

External clock frequency. The oscillator is ON in Active-Halt mode, so the total consumption

includes the oscillator consumption also. In Halt mode, current consumption is independent of

VDD and External clock frequency.

7.2 EXAMPLE 2: APPLICATION WITH PERIODIC WAKE-UP

This example provides a method for measuring the average current consumed by the micro in

different modes while it cycles continuously through “wake-up” and “sleep” periods. The

measurement is done using the following configuration.

External CLK

on CLKIN Pin

(MHz)

fCPU(MHz)

IDD at VDD = 4.5 V

IDD at VDD = 5 V

IDD at VDD = 5.5 V

366

µA428 µA

501

µA

238

µA277 µA

321

µA

122

µA136 µA

157

µA

External CLK

on CLKIN Pin

(MHz)

fCPU(MHz)

IDD at VDD = 4.5 V

IDD at VDD = 5 V

IDD at VDD = 5.5 V

0.1

µA0.1 µA0.1 µA

0.1

µA0.1 µA0.1 µA

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