AN4570 datasheet(42/46 Pages) STMICROELECTRONICS

42 / 46 page

Interfacing with an 8-bit NAND Flash memory

AN4570

42/46

DocID026804 Rev 1

When an error occurs during the write operation, this error is either correctable or

uncorrectable depending on the ECC XOR operation:

•

Case of a correctable error

The ECC XOR operation contains 11-bit data at 1. And each pair parity is 0x10 or 0x01.

•

Case of an ECC error

The ECC XOR operation contains only one bit at 1.

•

Case of an uncorrectable error

The ECC XOR operation is random data. In this case the page data cannot be

corrected.

Based on the flowchart shown in Figure 12, the correction software is easy to implement.

The first step consists in detecting whether an error occurred during the write operation. If

that was the case, the second step consists in determining if the error is correctable or not. If

it is correctable, then the third step consists in correcting the error.

The error correction is based on the second ECC generated after the read operation. The

error location can be identified from this code. Usually, the following data are extracted from

the ECC:

P1024, P512, P256, P128, P64, P32, P16, P8, P4, P2, P1, where Px are the line and

column parity.

In case of an 8-bit memory, P4, P2, P1 define the error bit position. And P1024, P512, P256,

P128, P64, P32, P16, P8 define the error byte position.

AN4570 Datasheet(PDF) 42 Page - STMicroelectronics