LAN9730 datasheet(108/222 Pages) MICROCHIP

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LAN9730/LAN9730i

DS00001946A-page 108

 2012-2015 Microchip Technology Inc.

4.12.1.2

Remote Wake Generation

4.12.1.2.1 Wake On LAN Event or Energy Detect

Control bits are implemented in the MAC’s Wakeup Control and Status Register (WUCSR) to control Global Unicast

Frame Wakeup, Magic Packet Wakeup, Wake Up Frame Detection Wakeup, Perfect DA Frame Wakeup, and Broadcast

Frame Wakeup: GUEN, MPEN, WUEN, PFDA_EN, and BCAST_EN, respectively. A composite signal, depending on

the state of these control bits and the associated event, is generated and propagated for further processing, as dis-

cussed in the following text.

Two control bits are implemented in the PMT_CTRL SCSR: Wake On LAN Enable (WOL_EN) and Energy Detect

Enable (ED_EN). Depending on the state of these control bits, the logic will generate an internal wake event interrupt

when the MAC detects a wakeup event (Global Unicast Frame, Wakeup Frame, Magic Packet, Perfect Destination

Address Frame, or Broadcast Frame - depending on the state of the aforementioned composite signal), or a PHY inter-

rupt is asserted (energy detect). Two Wakeup Status (WUPS) bits are implemented in the SCSR space. These bits are

set depending on the corresponding wake event. (See Section 6.3.8, "Power Management Control Register

(PMT_CTL)" for further information). If a Wake On LAN event is detected, then further resolution on the source of the

event can be obtained by examining the Remote Wakeup Frame Received (WUFR), Magic Packet Received (MPR),

Perfect DA Frame Received (PFDA_FR), and Broadcast Frame Received (BCAST_FR) status bits in the MAC’s

Wakeup Control and Status Register (WUCSR).

Note:

The IME bit is in the Hardware Configuration Register (HW_CFG). General Purpose IO Configuration Reg-

ister (GPIO_CFG) and General Purpose IO Wake Enable and Polarity Register (GPIO_WAKE) must be set

accordingly. PHY Link Up Enable (PHY_LINKUP_EN) bit of the General Purpose IO Wake Enable and

Polarity Register (GPIO_WAKE) must be set if PHY Link Up is used to cause a wake event. Diagram does

not represent actual hardware implementation.

FIGURE 4-33:

DETAILED GPIOS 8-10 WAKE DETECTION LOGIC

Note:

The IME bit is in the Hardware Configuration Register (HW_CFG). LED General Purpose IO Configuration

must be set accordingly. Diagram does not represent actual hardware implementation.

Note:

Wake On LAN events resulting in the generation of a remote-wake event may only occur when in SUS-

PEND0 state.

Note:

Energy Detect events resulting in the generation of a remote-wake event may only occur when in SUS-

PEND1 state.

GPIOn_INT clear

GPIOn

GPIOPOLn

Latch

GPDIRn

GPDn

GPCTLn[0]

GPIOWKn

GPIOn_DET

IME

GPCTLn[1]

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