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M34E04B Datasheet(PDF) 8 Page - STMicroelectronics |
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M34E04B Datasheet(HTML) 8 Page - STMicroelectronics |
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8 / 35 page ![]() Signal description M34E04B 8/35 DocID028428 Rev 1 2 Signal description 2.1 Serial clock (SCL) The signal applied on this input is used to strobe the data available on SDA(in) and to output the data on SDA(out). If SCL is driven low for tTIMEOUT (see Table 13) or longer, the M34E04B is set back in Standby mode, ready to receive a new START condition. 2.2 Serial data (SDA) SDA is an input/output used to transfer data in or out of the device. SDA(out) is an open drain output that may be wire-OR’ed with other open drain or open collector signals on the bus. A pull-up resistor must be connected from Serial Data (SDA) to VCC. (Figure 12 indicates how the value of the pull-up resistor can be calculated). 2.3 Slave address (SA2, SA1, SA0) (SA2,SA1,SA0) input signals are used to set the value that is to be looked for on the three least significant bits (b3, b2, b1) of the 7-bit Device Type Identifier Code (DTIC, see Table 2). These inputs must be tied to VCC or VSS, as shown in Figure 3. When not connected (left floating), these inputs are read as low (0). The SA0 input is used to detect the VHV voltage, when decoding an SWP or CWP instruction. Figure 3. Device select code 2.4 Supply voltage (VCC) 2.4.1 Operating supply voltage VCC Prior to selecting the memory and issuing instructions to it, a valid and stable VCC voltage within the specified [VCC(min), VCC(max)] range must be applied (see Table 8). In order to secure a stable DC supply voltage, it is recommended to decouple the VCC line with a suitable capacitor (usually of the order of 10 nF to 100 nF) close to the VCC/VSS package pins. |
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