TMS320F28374DPTPS datasheet(6/212 Pages) TI1

6 / 212 page

TMS320F28379D, TMS320F28377D

TMS320F28376D, TMS320F28375D, TMS320F28374D

SPRS880F – DECEMBER 2013 – REVISED NOVEMBER 2015

www.ti.com

Revision History

NOTE: Page numbers for previous revisions may differ from page numbers in the current version.

Changes from September 25, 2015 to November 9, 2015 (from E Revision (September 2015) to F Revision)

Page

•

Global: Added TMS320F28379D.

.................................................................................................. 1

•

Section 1.3 (Description): Added description of Configurable Logic Block (CLB).

.......................................... 2

•

Table 3-1 (Device Comparison): Added TMS320F28379D.

.................................................................... 7

•

Table 3-1: Added Configurable Logic Block (CLB).

............................................................................. 7

•

Section 4.5.3 (Output X-BAR and ePWM X-BAR): Changed section title from "Output X-BAR" to "Output X-BAR

and ePWM X-BAR".

................................................................................................................ 44

•

Section 4.5.3: Updated section.

.................................................................................................. 44

•

Figure 4-8 (Output X-BAR and ePWM X-BAR): Replaced "Output X-BAR" figure with "Output X-BAR and ePWM

X-BAR" figure.

...................................................................................................................... 44

•

Table 5-1 (Device Current Consumption at 200-MHz SYSCLK): Updated TEST CONDITIONS for Flash

Erase/Program mode.

.............................................................................................................. 48

•

Section 5.5.1 (Current Consumption Graphs): Changed section title from "Operational Current Consumption

Graphs" to "Current Consumption Graphs".

.................................................................................... 49

•

Section 5.5.1: Added information about leakage current and temperature.

................................................ 49

•

Figure 5-3 (IDD Leakage Current Versus Temperature): Added graph. ..................................................... 50

•

Figure 5-7 (Clocking System): Changed figure title from "Device Clocking" to "Clocking System".

..................... 58

•

Table 5-12 (Internal Clock Frequencies): Updated table.

..................................................................... 60

•

Table 5-18 (Internal Oscillator Electrical Characteristics): Updated table.

.................................................. 63

•

Section 5.7.4 (Flash Parameters): Updated "The on-chip flash memory is tightly integrated ..." paragraph.

.......... 64

•

Table 5-42 (ADC Characteristics (16-Bit Differential Mode)): Added "IO activity is minimized on pins ..." footnote.

.. 97

•

Table 5-44 (ADC Characteristics (12-Bit Single-Ended Mode)): Updated table.

........................................... 99

•

Table 5-44: Added "IO activity is minimized on pins ..." footnote.

........................................................... 99

•

Section 5.8.1.1.2 (ADC Timing Diagrams): Removed "ADC Timings for 12-Bit Mode in Early Interrupt Mode"

figure.

............................................................................................................................... 102

•

Section 5.8.1.1.2: Removed "ADC Timings for 16-Bit Mode in Early Interrupt Mode" figure.

.......................... 102

•

Table 5-49 (ADC Timings in 12-Bit Mode (SYSCLK Cycles)): Updated table.

........................................... 103

•

Figure 5-32 (ADC Timings for 12-Bit Mode): Changed figure title from "ADC Timings for 12-Bit Mode in Late

Interrupt Mode" to "ADC Timings for 12-Bit Mode".

.......................................................................... 103

•

Table 5-50 (ADC Timings in 16-Bit Mode): Updated table.

................................................................. 104

•

Figure 5-33 (ADC Timings for 16-Bit Mode): Changed figure title from "ADC Timings for 16-Bit Mode in Late

Interrupt Mode (SYSCLK Cycles)" to "ADC Timings for 16-Bit Mode".

.................................................... 104

•

Table 5-53 (CMPSS DAC Static Electrical Characteristics): Added "Per active CMPSS module" footnote.

......... 109

•

Table 5-54 (Buffered DAC Electrical Characteristics): Added "Per active Buffered DAC module" footnote.

......... 112

•

Figure 5-66 (SPI CPU Interface): Changed figure title from "SPI" to "SPI CPU Interface".

............................. 149

•

Section 6.1 (Overview): Added description of Configurable Logic Block (CLB).

......................................... 174

•

Table 6-9 (Device Identification Registers): Added PARTIDH for TMS320F28379D.

................................... 184

•

Section 6.15 (Configurable Logic Block (CLB)): Added section.

............................................................ 196

•

Section 7.1 (TI Design or Reference Design): Added section.

.............................................................. 197

•

Section 7.3.3 (Pin Mux Tool): Changed section title from "Pin Mux Utility for ARM

® and F2837xD

Microcontrollers" to "Pin Mux Tool".

............................................................................................ 198

Revision History

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