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TMP320C2811PBKA Datasheet(PDF) 88 Page - Texas Instruments |
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TMP320C2811PBKA Datasheet(HTML) 88 Page - Texas Instruments |
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88 / 147 page ![]() Electrical Specifications 88 June 2004 SPRS257 6.8 Signal Transition Levels Note that some of the signals use different reference voltages, see the recommended operating conditions table. Output levels are driven to a minimum logic-high level of 2.4 V and to a maximum logic-low level of 0.4 V. Figure 6−2 shows output levels. 0.4 V (VOL) 20% 2.4 V (VOH) 80% Figure 6−2. Output Levels Output transition times are specified as follows: • For a high-to-low transition, the level at which the output is said to be no longer high is below 80% of the total voltage range and lower and the level at which the output is said to be low is 20% of the total voltage range and lower. • For a low-to-high transition, the level at which the output is said to be no longer low is 20% of the total voltage range and higher and the level at which the output is said to be high is 80% of the total voltage range and higher. Figure 6−3 shows the input levels. 0.8 V (VIL) 10% 2.0 V (VIH) 90% Figure 6−3. Input Levels Input transition times are specified as follows: • For a high-to-low transition on an input signal, the level at which the input is said to be no longer high is 90% of the total voltage range and lower and the level at which the input is said to be low is 10% of the total voltage range and lower. • For a low-to-high transition on an input signal, the level at which the input is said to be no longer low is 10% of the total voltage range and higher and the level at which the input is said to be high is 90% of the total voltage range and higher. NOTE: See the individual timing diagrams for levels used for testing timing parameters. |
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