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DP83848JSQ/NOPB Datasheet(PDF) 27 Page - Texas Instruments |
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DP83848JSQ/NOPB Datasheet(HTML) 27 Page - Texas Instruments |
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27 / 84 page  DP83848H, DP83848J, DP83848K, DP83848M, DP83848T www.ti.com SNLS250E – MAY 2008 – REVISED APRIL 2015 6.3 Feature Description This section includes information on the various configurable features available with the DP83848x. The configurations features described below include: • Auto-Negotiation • Auto-MDIX • LED Interface • Internal Loopback • BIST • Energy Detect Mode 6.3.1 Auto-Negotiation The Auto-Negotiation function provides a mechanism for exchanging configuration information between two ends of a link segment and automatically selecting the highest performance mode of operation supported by both devices. Fast Link Pulse (FLP) Bursts provide the signaling used to communicate Auto- Negotiation abilities between two devices at each end of a link segment. For further detail regarding Auto- Negotiation, refer to Clause 28 of the IEEE 802.3 specification. The DP83848x supports four different Ethernet protocols (10 Mb/s Half Duplex, 10 Mb/s Full Duplex, 100 Mb/s Half Duplex, and 100 Mb/s Full Duplex), so the inclusion of Auto-Negotiation ensures that the highest performance protocol will be selected based on the advertised ability of the Link Partner. In DP83848x, the Auto-Negotiation function can be controlled either by internal register access or by the use of AN0 and AN1 pins. 6.3.1.1 Auto-Negotiation Pin Control The state of AN0 and AN1 pins determine the specific mode advertised by the device as given in Table 6- 1. The state of AN0 and AN1 pins, upon power up/reset, determines the state of bits [8:5] of the ANAR register. The Auto-Negotiation function selected at power up or reset can be changed at any time by writing to the Basic Mode Control Register (BMCR) at address 0x00h. Table 6-1. Auto-Negotiation Modes in DP83848x AN1 AN0 ADVERTISED MODE 0 0 10BASE-T, Half/Full-Duplex 0 1 100BASE-TX, Half/Full-Duplex 1 0 10BASE-T, Half-Duplex 100BASE-TX, Half-Duplex 1 1 10BASE-T, Half/Full-Duplex 100BASE-TX, Half/Full-Duplex 6.3.1.2 Auto-Negotiation Register Control When Auto-Negotiation is enabled, the DP83848x transmits the abilities programmed into the Auto- Negotiation Advertisement register (ANAR) at address 04h through FLP Bursts. Any combination of 10 Mb/s, 100 Mb/s, Half-Duplex, and Full Duplex modes may be selected. Auto-Negotiation Priority Resolution: 1. 100BASE-TX Full Duplex (Highest Priority) 2. 100BASE-TX Half Duplex 3. 10BASE-T Full Duplex 4. 10BASE-T Half Duplex (Lowest Priority) Copyright © 2008–2015, Texas Instruments Incorporated Detailed Description 27 Submit Documentation Feedback Product Folder Links: DP83848H DP83848J DP83848K DP83848M DP83848T |
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