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DP83848JSQ/NOPB Datasheet(PDF) 28 Page - Texas Instruments |
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DP83848JSQ/NOPB Datasheet(HTML) 28 Page - Texas Instruments |
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28 / 84 page  DP83848H, DP83848J, DP83848K, DP83848M, DP83848T SNLS250E – MAY 2008 – REVISED APRIL 2015 www.ti.com The Basic Mode Control Register (BMCR) at address 00h provides control for enabling, disabling, and restarting the Auto-Negotiation process. When Auto-Negotiation is disabled, the Speed Selection bit in the BMCR controls switching between 10 Mb/s or 100 Mb/s operation, and the Duplex Mode bit controls switching between full duplex operation and half duplex operation. The Speed Selection and Duplex Mode bits have no effect on the mode of operation when the Auto-Negotiation Enable bit is set. The Link Speed can be examined through the PHY Status Register (PHYSTS) at address 10h after a Link is achieved. The Basic Mode Status Register (BMSR) indicates the set of available abilities for technology types, Auto- Negotiation ability, and Extended Register Capability. These bits are permanently set to indicate the full functionality of the DP83848x (only the 100BASE-T4 bit is not set because the DP83848x does not support that function). The BMSR also provides status on: • Completion of Auto-Negotiation • Occurrence of a remote fault as advertised by the Link Partner • Establishment of a valid link • Support for Management Frame Preamble suppression The Auto-Negotiation Advertisement Register (ANAR) indicates the Auto-Negotiation abilities to be advertised by the DP83848x. All available abilities are transmitted by default, but any ability can be suppressed by writing to the ANAR. Updating the ANAR to suppress an ability is one way for a management agent to change (restrict) the technology that is used. The Auto-Negotiation Link Partner Ability Register (ANLPAR) at address 05h is used to receive the base link code word as well as all next page code words during the negotiation. Furthermore, the ANLPAR will be updated to either 0081h or 0021h for parallel detection to either 100 Mb/s or 10 Mb/s respectively. The Auto-Negotiation Expansion Register (ANER) indicates additional Auto-Negotiation status. The ANER provides status on: • Occurrence of a Parallel Detect Fault • Next Page function support by the Link Partner • Next page support function by DP83848x • Reception of the current page that is exchanged by AutoNegotiation • Auto-Negotiation support by the Link Partner 6.3.1.3 Auto-Negotiation Parallel Detection The DP83848x supports the Parallel Detection function as defined in the IEEE 802.3 specification. Parallel Detection requires both the 10 Mb/s and 100 Mb/s receivers to monitor the receive signal and report link status to the Auto-Negotiation function. Auto-Negotiation uses this information to configure the correct technology in the event that the Link Partner does not support Auto-Negotiation but is transmitting link signals that the 100BASE-TX or 10BASE-T PMAs recognize as valid link signals. If the DP83848x completes Auto-Negotiation as a result of Parallel Detection, bit 5 or bit 7 within the ANLPAR register will be set to reflect the mode of operation present in the Link Partner. Note that bits 4:0 of the ANLPAR will also be set to 00001 based on a successful parallel detection to indicate a valid 802.3 selector field. Software may determine that negotiation completed through Parallel Detection by reading a zero in the Link Partner Auto-Negotiation Able bit once the Auto-Negotiation Complete bit is set. If configured for parallel detect mode and any condition other than a single good link occurs then the parallel detect fault bit will be set. 28 Detailed Description Copyright © 2008–2015, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: DP83848H DP83848J DP83848K DP83848M DP83848T |
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