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DP83848JSQ/NOPB Datasheet(PDF) 47 Page - Texas Instruments |
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DP83848JSQ/NOPB Datasheet(HTML) 47 Page - Texas Instruments |
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47 / 84 page  DP83848H, DP83848J, DP83848K, DP83848M, DP83848T www.ti.com SNLS250E – MAY 2008 – REVISED APRIL 2015 6.5.1.3.9 Transmitter The encoder begins operation when the Transmit Enable input (TX_EN) goes high and converts NRZ data to pre-emphasized Manchester data for the transceiver. For the duration of TX_EN, the serialized Transmit Data (TXD) is encoded for the transmit-driver pair (PMD Output Pair). TXD must be valid on the rising edge of Transmit Clock (TX_CLK). Transmission ends when TX_EN deasserts. The last transition is always positive; it occurs at the center of the bit cell if the last bit is a one, or at the end of the bit cell if the last bit is a zero. 6.5.1.3.10 Receiver The decoder detects the end of a frame when no additional mid-bit transitions are detected. Within one and a half bit times after the last bit, carrier sense is deasserted. Receive clock stays active for five more bit times after CRS goes low, to ensure the receive timings of the controller. Copyright © 2008–2015, Texas Instruments Incorporated Detailed Description 47 Submit Documentation Feedback Product Folder Links: DP83848H DP83848J DP83848K DP83848M DP83848T |
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