| Electronic Components Datasheet Search |
|
DP83848JSQ/NOPB Datasheet(PDF) 43 Page - Texas Instruments |
|
|
|
|||||||||||||||||||||||||||||
DP83848JSQ/NOPB Datasheet(HTML) 43 Page - Texas Instruments |
|
43 / 84 page ![]() DP83848H, DP83848J, DP83848K, DP83848M, DP83848T www.ti.com SNLS250E – MAY 2008 – REVISED APRIL 2015 BLW results from the interaction between the low-frequency components of a transmitted bit stream and the frequency response of the AC coupling components within the transmission system. If the low- frequency content of the digital bit stream goes below the low-frequency pole of the AC coupling transformers then the droop characteristics of the transformers will dominate resulting in potentially serious BLW. The digital oscilloscope plot provided in Figure 6-8 illustrates the severity of the BLW event that can theoretically be generated during 100BASE-TX packet transmission. This event consists of approximately 800 mV of DC offset for a period of 120 µs. Left uncompensated, events such as this can cause packet loss. Figure 6-8. 100BASE-TX BLW Event 6.5.1.2.5 Signal Detect The signal detect function of the DP83848x is incorporated to meet the specifications mandated by the ANSI FDDI TP-PMD Standard as well as the IEEE 802.3 100BASE-TX Standard for both voltage thresholds and timing parameters. Note that the reception of normal 10BASE-T link pulses and fast link pulses per IEEE 802.3 Auto- Negotiation by the 100BASE-TX receiver do not cause the DP83848x to assert signal detect. 6.5.1.2.6 MLT-3 to NRZI Decoder The DP83848x decodes the MLT-3 information from the Digital Adaptive Equalizer block to binary NRZI data. 6.5.1.2.7 NRZI to NRZ In a typical application, the NRZI to NRZ decoder is required in order to present NRZ formatted data to the descrambler. 6.5.1.2.8 Serial to Parallel The 100BASE-TX receiver includes a Serial to Parallel converter which supplies 5-bit wide data symbols to the PCS Rx state machine. 6.5.1.2.9 Descrambler A serial descrambler is used to de-scramble the received NRZ data. The descrambler has to generate an identical data scrambling sequence (N) in order to recover the original unscrambled data (UD) from the scrambled data (SD) as represented in the equations: SD = (UD ⊕ N) (1) UD = (SD ⊕ N) (2) Copyright © 2008–2015, Texas Instruments Incorporated Detailed Description 43 Submit Documentation Feedback Product Folder Links: DP83848H DP83848J DP83848K DP83848M DP83848T |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |