MICRF229 datasheet(13/23 Pages) MICREL

13 / 23 page

Micrel, Inc.

MICRF229

April 15, 2015

Revision 1.0

Figure 4 shows the behavior with a larger capacitor on

AGC pin (2.2

μF), D[4:3] = 01. In this case, V

AGC does not

undershoot (RSSI does not overshoot), and TTGD is

relatively short at 1ms.

Figure 4. Proper TTGD (1ms) with Sufficient AGC

Reference Oscillator

The reference oscillator in the MICRF229 (Figure 5) uses

a basic Pierce crystal oscillator configuration with MOS

transconductor. Though the MICRF229 has built-in load

capacitors for the crystal oscillator, the external load

capacitors are still required for tuning it to the right

frequency. RO1 and RO2 are external pins of the

MICRF229 to connect the crystal to the reference

oscillator.

Figure 5. Reference Oscillator Circuit

Table 5. Reference Frequency Examples

RF Input Frequency (MHz)

Reference Frequency (MHz)

418.0

13.02708

433.92

13.52313

(9)

Note:

Empirically derived, slightly different from Equation 3.

Auto-Polling

The MICRF229 can be programmed into an auto-polling

mode by setting register bit D[15] to 1, where it monitors

if there is a valid incoming RF signal while holding DO

low. In this mode, the chip goes between sleep state and

polling state. In sleep state, only a low power sleep clock

is on, resulting in very low current consumption of 15

μA

typical. The sleep time is programmable from 10ms to

1.28s. In a polling state, every block in the MICRF229 is

on, and the chip looks for valid signal with bit durations

greater than a user-programmed value. This operation is

subsequently called “bit checking” in this datasheet.

“valid bit” is a mark or space with duration that is longer

than the bit check window. A “bad bit” is a mark or space

with duration that is shorter than the bit check window.

The user can set different bit check window time to suit a

particular signal by programming register bits D[11:9] as

listed in the register programming section. The number

of consecutive valid bits before releasing DO and exiting

polling mode can also be set by register bits D[8:7].

Figure 6. One Bad Bit Followed by Two Valid Bits

During the bit checking operation, DO is held low while

the bit checker examines the pulse widths at the node

labeled DO in Functional Diagram. If there is no signal

present and DO’ randomly chatters, the MICRF229

returns to sleep after seeing four consecutive bad bits.

Note that since DO randomly chatters with no signal

present, the amount of time it takes for 4 consecutive bad

bits to happen is random.

Therefore, the duration of

polling time is random without signal.

If enough consecutive valid bits are found, DO is

released and the MICRF229 stays on in the continuous

receive mode.

Once the chip is in continuous receive

mode, it will not go back to sleep automatically when RF

signal

removed.

The

bits

must

reprogrammed again to put the MICRF229 back into

auto-polling mode.

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