PC87310 datasheet(22/52 Pages) NSC

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40 Functional Description (Continued)

The controller takes best advantage of the internal data

separator by implementing a sophisticated ID search algo-

rithm This algorithm shown in

Figure 4 enhances the

PLL’s lock characteristics by forcing the PLL to relock to the

crystal any time the data separator attempts to lock to a

non-preamble pattern This algorithm ensures that the PLL

is not thrown way out of lock by write splices or bad data

fields

TABLE 4-8 Typical Filter Values for the Various Data

Rates (Assuming g6% Capture Range)

Data Rate

(MFM bs)

Filter Values when Using All 3 Data Rates

10M

C2C e 0012 mF 560X

510 pF

56 kX

500k

C2B e 0015 mF

250300k

C2A e 0033 mF

Filter Values when Using 250300 and 500 kbs

500k

C2B e 0027 mF 560X 1000 pF 56 kX

250300k

C2A e 0047 mF 560X

Filter Using Only One Data Rate

10M

C2 e 0012 mF

560X

510 pF

56 kX

500k

C2 e 0027 mF

560X

1000 pF

56 kX

300250k

C2 e 0047 mF

560X

2000 pF

56 kX

(These values are preliminary and thus are subject to change)

TABLE 4-9 Data Rates (MFM) versus

VCO Divide-By Factor

Data Rate

1 Mbs

500 kbs

300 kbs

250 kbs

PLL DIAGNOSTIC MODES

In addition the FDC has two diagnostic modes to enable

filter optimization 1) enabling the Charge Pump output sig-

nal onto the PUMPPREN pin and 2) providing external

control of the Read Gate signal to the data separator Both

modes are enabled in the last byte of the Mode Command

The Pump output signal indicates when the charge pump is

making a phase correction and hence whether the loop is

locked or not

The Read Gate function when enabled allows the designer

to manually force the data separator to lock to the incoming

data or back to the reference clock This enables easy veri-

fication of the lock characteristics of the PLL by monitoring

the FILTER pin and the Pump signal

PLL FILTER DESIGN

This section provides information to enable design of the

data separator’s external filter and charge pump set resis-

tor This discussion is for a single data rate filter and can be

easily extrapolated to the other filters of

Figure 3 Table 4-8

shows some typical filter component values but if a custom

filter is desired the following parameters must be consid-

ered

Charge pump current setting resistor The current

set by this resistor is multiplied by the charge pump

gain KP which is E25 Thus the charge pump cur-

rent is

IPUMP e (25) 12VR1 R1 should be set to between

3–12 kX This resistor determines the gain of the phase

detector which is KD e IPUMP 2q

TLC10591 – 12

FIGURE 4 Read Algorithm-State Diagram for Data

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