FLASH

AS8FLC2M32

AS8FLC2M32B

Rev. 1.6 05/11

Micross Components reserves the right to change products or specifications without notice.

24

Erase and Programming Performance

Typ

1

Max

2

Unit

Comments

0.5

10

s

16

s

6

150

μs

Excludes system level overhead

5

Parameter

Sector Erase Time

Chip Erase Time

Byte Programming Time

Excludes 00h programming prior

to erasure

4

NOTES

1.Typical program and erase times assume the following conditions: 25°C, VCC = 3.0 V, 100,000 cycles, checkerboard data

pattern.

2.Under worst case conditions of 90°C, VCC = 2.7 V, 1,000,000 cycles.

3.The typical chip programming time is considerably less than the maximum chip programming time listed, since most bytes

program faster than the maximum program times listed.

4.In the pre-programming step of the Embedded Erase algorithm, all bytes are programmed to 00h before erasure.

5.System-level overhead is the time required to execute the two- or four-bus-cycle sequence for the program command.

6.The device has a minimum erase and program cycle endurance of 100,000 cycles per sector.

Hardware Reset (RESET\)

JEDEC

Std

20

μs

500

max

All Speed Options

RESET# Pin Low (During Embedded Algorithms) to

Read or Write (See Note)

RESET# Pin Low (NOT During Embedded Algorithms)

Unit

Test Setup

Parameter

Description

500

500

50

20

μs

min

ns

(g

g

)

to Read or Write (See Note)

RESET# Pulse Width

RESET# High Time Before Read (See Note)

RESET# Low to Standby Mode

Note:

Not 100% Tested