LAN8742AI-CZ datasheet(32/124 Pages) MICROCHIP

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LAN8742A/LAN8742Ai

DS00001989A-page 32

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3.7.4

nINTSEL: nINT/REFCLKO CONFIGURATION

The nINTSEL configuration strap is used to select between one of two available modes: REF_CLK In Mode (nINT) and

REF_CLK Out Mode. The configured mode determines the function of the nINT/REFCLKO pin. The nINTSEL configu-

ration strap is latched at POR and on the rising edge of the nRST. By default, nINTSEL is configured for nINT mode via

the internal pull-up resistor.

The RMII REF_CLK is a continuous clock that provides the timing reference for CRS_DV, RXD[1:0], TXEN, TXD[1:0]

and RXER. The device uses REF_CLK as the network clock such that no buffering is required on the transmit data path.

However, on the receive data path, the receiver recovers the clock from the incoming data stream. The device uses

elasticity buffering to accommodate for differences between the recovered clock and the local REF_CLK.

In REF_CLK In Mode, the 50 MHz REF_CLK is driven on the XTAL1/CLKIN pin. This is the traditional system configu-

ration when using RMII, and is described in Section 3.7.4.1. When configured for REF_CLK Out Mode, the device gen-

erates the 50 MHz RMII REF_CLK and the nINT interrupt is not available. REF_CLK Out Mode allows a low-cost

25 MHz crystal to be used as the reference for REF_CLK. This configuration may result in reduced system cost and is

described in Section 3.7.4.2.

TABLE 3-6:

nINTSEL CONFIGURATION

Strap Value

Mode

REF_CLK Description

nINTSEL = 0

REF_CLK Out Mode

nINT/REFCLKO is the source of REF_CLK.

nINTSEL = 1

REF_CLK In Mode

nINT/REFCLKO is an active low interrupt output.

The REF_CLK is sourced externally and must be driven

on the XTAL1/CLKIN pin.

Note:

Because the nINTSEL configuration strap shares functionality with the LED2 pin, proper consideration

must also be given to the LED polarity. Refer to Section 3.8.1.6, "nINTSEL and LED2 Polarity Selection"

for additional information on the relation between nINTSEL and the LED2 polarity.

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