LAN8742AI-CZ datasheet(59/124 Pages) MICROCHIP

59 / 124 page

 2013-2015 Microchip Technology Inc.

DS00001989A-page 59

LAN8742A/LAN8742Ai

4.2.1

BASIC CONTROL REGISTER

Note 1: The default value of this bit is determined by the MODE[2:0] configuration straps. Refer to Section 3.7.2,

"MODE[2:0]: Mode Configuration" for additional information.

Index (In Decimal):

Size:

16 bits

Bits

Description

Type

Default

Soft Reset

1 = Software reset. Bit is self-clearing. When setting this bit do not set other

bits in this register.

Note:

The configuration (as described in Section 3.7.2, "MODE[2:0]:

Mode Configuration") is set from the register bit values, and not

from the mode pins.

R/W

Loopback

0 = Normal operation

1 = Loopback mode

R/W

Speed Select

0 = 10 Mbps

1 = 100 Mbps

Note:

Ignored if auto-negotiation is enabled (0.12 = 1).

R/W

(see Note 1)

Auto-Negotiation Enable

0 = Disable auto-negotiate process

1 = Enable auto-negotiate process (overrides 0.13 and 0.8)

R/W

(see Note 1)

Power Down

0 = Normal operation

1 = General power down mode

R/W

Isolate

0 = Normal operation

1 = Electrical isolation of PHY from the RMII

R/W

Restart Auto-Negotiate

0 = Normal operation

1 = Restart auto-negotiate process

Note:

Bit is self-clearing.

R/W

Duplex Mode

0 = Half duplex

1 = Full duplex

Note:

Ignored if Auto-Negotiation is enabled (0.12 = 1).

R/W

(see Note 1)

7:0

RESERVED

LAN8742Ai-CZ Datasheet(PDF) 59 Page - Microchip Technology

LAN8742Ai-CZ Datasheet(HTML) 59 Page - Microchip Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL