| Electronic Components Datasheet Search |
|
LAN8742Ai-CZ Datasheet(PDF) 93 Page - Microchip Technology |
|
|
|||||||||||||||||||||||||||||
LAN8742Ai-CZ Datasheet(HTML) 93 Page - Microchip Technology |
|
93 / 124 page ![]() 2013-2015 Microchip Technology Inc. DS00001989A-page 93 LAN8742A/LAN8742Ai 4.3.10 MISCELLANEOUS CONFIGURATION REGISTER (MCFGR) Index (In Decimal): 3.32868 Size: 16 bits Bits Description Type Default 15:0 nPME Assert Delay This register controls the delay of nPME de-assertion time when the nPME Self Clear bit of the Wakeup Control and Status Register (WUCSR) is set. Each count is equivalent to a 20 µs delay. The delay max is 1.31 seconds. Time = (register value + 1) x 20 µs. R/W/ NASR 1000h |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |