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LPC18S50 Datasheet(PDF) 90 Page - NXP Semiconductors |
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LPC18S50 Datasheet(HTML) 90 Page - NXP Semiconductors |
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90 / 151 page ![]() LPC18S50_S30_S10 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2015. All rights reserved. Product data sheet Rev. 1 — 23 February 2015 90 of 151 NXP Semiconductors LPC18S50/S30/S10 32-bit ARM Cortex-M3 microcontroller IOZ OFF-state output current VO =0V to VDD(IO); on-chip pull-up/down resistors disabled; absolute value -3 -nA VI input voltage pin configured to provide a digital function; VDD(IO) 2.2 V 0 - 5.5 V VDD(IO) = 0 V 0 - 3.6 V VO output voltage output active 0 - VDD(IO) V VIH HIGH-level input voltage 0.7 VDD(IO) -5.5 V VIL LOW-level input voltage 0 - 0.3 VDD(IO) V Vhys hysteresis voltage 0.1 VDD(IO) --V VOH HIGH-level output voltage IOH = 8 mA VDD(IO) 0.4 --V VOL LOW-level output voltage IOL = 8 mA --0.4 V IOH HIGH-level output current VOH =VDD(IO) 0.4 V 8 --mA IOL LOW-level output current VOL = 0.4 V 8 --mA IOHS HIGH-level short-circuit output current drive HIGH; connected to ground [12] --86 mA IOLS LOW-level short-circuit output current drive LOW; connected to VDD(IO) [12] --76 mA Ipd pull-down current VI =VDD(IO) [14] [15] [16] -62 - A Ipu pull-up current VI =0V [14] [15] [16] - 62 - A VDD(IO) <VI 5V - 0 - A Open-drain I2C0-bus pins VIH HIGH-level input voltage 0.7 VDD(IO) --V VIL LOW-level input voltage 0 0.14 0.3 VDD(IO) V Vhys hysteresis voltage 0.1 VDD(IO) --V VOL LOW-level output voltage IOLS = 3 mA --0.4 V ILI input leakage current VI =VDD(IO) [13] -4.5 - A VI = 5 V --10 A Table 10. Static characteristics …continued Tamb = 40 C to +85 C unless otherwise specified. Symbol Parameter Conditions Min Typ[1] Max Unit |
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