TMS320VC5416 datasheet(27/98 Pages) TI1

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3.7.1

Enhanced 8-/16-Bit Host-Port Interface (HPI8/16)

TMS320VC5416

Fixed-Point Digital Signal Processor

www.ti.com

SPRS095P – MARCH 1999 – REVISED OCTOBER 2008

The host-port interface, also referred to as the HPI8/16, is an enhanced version of the standard 8-bit HPI

found on earlier TMS320C54x™ DSPs (542, 545, 548, and 549). The HPI can be used to interface to an

8-bit or 16-bit host. When the address and data buses for external I/O is not used (to interface to external

devices in program/data/IO spaces), the HPI can be configured as an HPI16 to interface to a 16-bit host.

This configuration can be accomplished by connecting the HPI16 pin to logic "1”.

When the HPI16 pin is connected to a logic "0", the HPI is configured as an HPI8. The HPI8 is an 8-bit

parallel port for interprocessor communication. The features of the HPI8 include:

Standard features:

• Sequential transfers (with autoincrement) or random-access transfers

• Host interrupt and C54x™ interrupt capability

• Multiple data strobes and control pins for interface flexibility

The HPI8 interface consists of an 8-bit bidirectional data bus and various control signals. Sixteen-bit

transfers are accomplished in two parts with the HBIL input designating high or low byte. The host

communicates with the HPI8 through three dedicated registers — the HPI address register (HPIA), the

HPI data register (HPID), and the HPI control register (HPIC). The HPIA and HPID registers are only

accessible by the host, and the HPIC register is accessible by both the host and the device.

Enhanced features:

• Access to entire on-chip RAM through DMA bus

• Capability to continue transferring during emulation stop

The HPI16 is an enhanced 16-bit version of the TMS320C54x™ DSP 8-bit host-port interface (HPI8). The

HPI16 is designed to allow a 16-bit host to access the DSP on-chip memory, with the host acting as the

master of the interface. Some of the features of the HPI16 include:

• 16-bit bidirectional data bus

• Multiple data strobes and control signals to allow glueless interfacing to a variety of hosts

• Only nonmultiplexed address/data modes are supported

• 18-bit address bus used in nonmultiplexed mode to allow access to all internal memory (including

internal extended address pages)

• HRDY signal to hold off host accesses due to DMA latency

• The HPI16 acts as a slave to a 16-bit host processor and allows access to the on-chip memory of the

DSP.

NOTE

Only the nonmultiplexed mode is supported when the HPI is configured as a HPI16.

The HPI functions as a slave and enables the host processor to access the on-chip memory. A major

enhancement to the HPI over previous versions is that it allows host access to the entire on-chip memory

range of the DSP. The host and the DSP both have access to the on-chip RAM at all times and host

accesses are always synchronized to the DSP clock. If the host and the DSP contend for access to the

same location, the host has priority, and the DSP waits for one cycle. Note that since host accesses are

always synchronized to the device clock, an active input clock (CLKIN) is required for HPI accesses during

IDLE states, and host accesses are not allowed while the device reset pin is asserted.

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