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L6751C Datasheet(PDF) 24 Page - STMicroelectronics

Part # L6751C
Description  Digitally controlled dual PWM for Intel VR12 and AMD SVI
PDF  57 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

L6751C Datasheet(HTML) 24 Page - STMicroelectronics

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Device configuration and pin-strapping tables
L6751C
24/57
DocID025037 Rev 1
10
15
0.000 V
0.900 V
VSA
10
sec
(functional)
OFF
1.500 V
32
sec
(debug)
130
12
20
120
12
22.6
110
39
82
100
47
110
0.000 V
1.000 V
GFX
32
sec
(debug)
10
sec
(functional)
130
10
27
120
22
68
110
10
36
100
18
75
1.000 V
1.000 V
GFX
32
sec
(debug)
OFF
1.350 V
32
sec
(debug)
130
15
75
120
10
59
110
10
75
100
10
100
0.000 V
0.000 V
GFX
10
sec
(functional)
10
sec
(functional)
130
10
150
120
10
220
110
10
Open
100
1. Recommended values, divider needs to be connected between VCC5 pin and GND.
2. BOOT is ignored in AMD mode, only TMAX is operative.
3. Operative mode defined by ADDR pin. See Table 9 for details.
Table 10. BOOT / TMAX pin-strapping(1), (2) (continued)
Rdown
[k
]
Rup
[k
]
BOOT - Intel address 0000b(3)
Intel address 0010b, 0100b (3)
TMAX [C]
Multi-
phase
Single-
phase
Link rest
JMode
VBOOT
Link rest
Table 11. DPM pin-strapping(1)
Rdown [k
]Rup [k]
DPM1-3(2), (3)
DPM4-6(2), (3)
DPM12
DPM23
GDC0
DPM34
DPM46
GDC1
10
1.5
16 A
+20 A
1
+30 A
+22 A
1
10
2.7
0
0
22
6.8
+16 A
1
+14 A
1
10
3.6
0
0
27
11
+10 A
1
+8 A
1
12
5.6
0
0
82
43
+6 A
1
DPM OFF
1
13
7.5
0
0



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