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HT45F56 Datasheet(PDF) 18 Page - Holtek Semiconductor Inc |
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HT45F56 Datasheet(HTML) 18 Page - Holtek Semiconductor Inc |
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18 / 90 page ![]() Rev. 1.11 18 April 11, 2017 Rev. 1.11 19 April 11, 2017 HT45F56 Shock Detector Flash MCU HT45F56 Shock Detector Flash MCU On-Chip Debug Support – OCDS ThereisanEVchipnamedHT45V56whichisusedtoemulatetherealMCUdevicenamed HT45F56.TheEVchipdevicealsoprovidesthe“On-ChipDebug”functiontodebugtherealMCU deviceduringdevelopmentprocess.TheEVchipandrealMCUdevices,HT45V56andHT45F56, arealmostfunctionalcompatibleexceptthe“On-ChipDebug”function.UserscanusetheEVchip devicetoemulatetherealMCUdevicebehaviorsbyconnectingtheOCDSDAandOCDSCKpins totheHoltekHT-IDEdevelopmenttools.TheOCDSDApinistheOCDSData/Addressinput/output pinwhiletheOCDSCKpinistheOCDSclockinputpin.FormoredetailedOCDSinformation, refertothecorrespondingdocumentnamed“Holteke-Linkfor8-bitMCUOCDSUser’sGuide”. Holtek e-Link Pins EV Chip OCDS Pins Pin Description OCDSDA OCDSDA On-Chip Debug Support Data/Address input/output OCDSCK OCDSCK On-Chip Debug Support Clock input VDD VDD Power Supply VSS VSS Ground Data Memory TheDataMemoryisan8-bitwideRAMinternalmemoryandisthelocationwheretemporary informationisstored. Structure Dividedintotwotypes,thefirstofDataMemoryisanareaofRAMwherespecialfunctionregisters arelocated.Theseregistershavefixedlocationsandarenecessaryforcorrectoperationofthe device.Manyoftheseregisterscanbereadfromandwrittentodirectlyunderprogramcontrol, however,someremainprotectedfromusermanipulation.ThesecondareaofDataMemoryis reservedforgeneralpurposeuse.Alllocationswithinthisareaarereadandwriteaccessibleunder programcontrol. TheoverallDataMemoryissubdividedintotwobanks.TheSpecialPurposeDataMemoryregisters areaccessibleinallbanks,withtheexceptionoftheEECregisterataddress40H,whichisonly accessibleinBank1.SwitchingbetweenthedifferentDataMemorybanksisachievedbysettingthe BankPointertothecorrectvalue.ThestartaddressoftheDataMemoryforalldevicesistheaddress 00H. 00H 3FH 40H 5FH Special Purpose Data Memory General Purpose Data Memory Bank 0 EEC@40H in Bank 1 Data Memory Structure |
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