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CS4399 Datasheet(PDF) 62 Page - Cirrus Logic

Part # CS4399
Description  130-dB, 32-Bit High-Performance DAC
PDF  111 Pages
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Manufacturer  CIRRUS [Cirrus Logic]
Direct Link  http://www.cirrus.com
Logo CIRRUS - Cirrus Logic

CS4399 Datasheet(HTML) 62 Page - Cirrus Logic

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62
DS1113F1
CS4399
5.10 Example Sequences
44 Set MCLK source and frequency
System Clocking Control. 0x10006
0x05
Reserved
MCLK_INT
MCLK_SRC_SEL
0000 0
1
01
MCLK Frequency is set to 22.5792 MHz
MCLK Source is set to PLL
45 Wait for at least 150 µs.
46 Enable ASP clocks
Pad Interface Configuration. 0x1000D 0x02
Reserved
XSP_3ST
ASP_3ST
0000 00
1
0
XSP Interface status is don't care (set to default)
Enable serial clocks in Master Mode
47 Power up DAC
Refer to Ex. 5-6 for DSD power-up sequence. Note that in Step 2 of Ex. 5-6, HH = BF for DoP on
ASP interface. Skip Step 1 of Ex. 5-6 (completed in Step 3 above).
Example 5-9. DoP Playback with PLL (Cont.)
STEP
TASK
REGISTER/BIT FIELDS
VALUE
DESCRIPTION



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